mpc860p.h

基于如何开发MPC860处理器系统的核心业务模块QMC的开发程序

#ifndef __INCmpc860h
#define __INCmpc860h

#include "vxworks.h"
#include "/target/h/drv/multi/ppc860Siu.h"
#include "/target/h/drv/intrCtl/ppc860Intr.h"
#include "860sar.h"

typedef struct global_qmc_pram 
{

    VUINT32   	mcbase;		/* Multichannel Base pointer */
    VUINT16  	qmcstate;	/* Multichannel Controller state */
    VUINT16  	mrblr;		/* Maximum Receive Buffer Length */
    VUINT16  	tx_s_ptr;   	/* TSATTx Pointer */
    VUINT16  	rxptr;	   	/* Current Time slot entry in TSATRx */
    VUINT16  	grfthr;		/* Global Receive frame threshold */
    VUINT16  	grfcnt;		/* Global Receive Frame Count */
    VUINT32  	intbase;	/* Multichannel Base address */
    VUINT32   	intptr;		/* Pointer to interrupt queue */
    VUINT16  	rx_s_ptr;   	/* TSATRx Pointer */
    VUINT16  	txptr;	   	/* Current Time slot entry in TSATTx */
    VUINT32  	c_mask32;	/* CRC Constant (debb20e3) */
    VUINT16  	tsatrx[32];	/* Time Slot Assignment Table Rx */
    VUINT16  	tsattx[32];	/* Time Slot Assignment Table Tx */
    VUINT16  	c_mask16;	/* CRC Constant (f0b8) */

}QMCPARAM;


typedef struct qmc_hdlc_pram 
{

    VUINT16		tbase;		/* Tx Buffer Descriptors Base Address */
    VUINT16  	chamr;		/* Channel Mode Register */
    VUINT32   	tstate;		/* Tx Internal State */
    VUINT32  	txintr;		/* Tx Internal Data Pointer */
    VUINT16  	tbptr;		/* Tx Buffer Descriptor Pointer */
    VUINT16  	txcntr;		/* Tx Internal Byte Count */
    VUINT32   	tupack;		/* (Tx Temp) */
    VUINT32   	zistate;	/* Zero Insertion machine state */
    VUINT32   	tcrc;		/* Temp Transmit CRC */
    VUINT16  	intmsk;		/* Channel's interrupt mask flags */
    VUINT16  	bdflags;		
    VUINT16  	rbase;		/* Rx Buffer Descriptors Base Address */
    VUINT16  	mflr;		/* Max Frame Length Register */
    VUINT32   	rstate;		/* Rx Internal State */
    VUINT32  	rxintr;		/* Rx Internal Data Pointer */
    VUINT16  	rbptr;		/* Rx Buffer Descriptor Pointer */
    VUINT16  	rxbyc;		/* Rx Internal Byte Count */
    VUINT32   	rpack;		/* (Rx Temp) */
    VUINT32  	zdstate;	/* Zero Deletion machine state */
    VUINT32   	rcrc;		/* Temp Transmit CRC */
    VUINT16  	maxc;		/* Max_length counter */
    VUINT16  	tmp_mb;		/* Temp */

}QMCCHAN;

/* only used for qmc */
#define PARAM_BASE			(INTERNAL_MEM_MAP_ADDR + 0x3c00)
#define PARAM(x)    		(PARAM_BASE + 0x100 * ((x)-1))
#define QMC_CHAN_BASE		(INTERNAL_MEM_MAP_ADDR + 0x2000)

#define QMC_BD_BASE		0x03000000
#define QMC_BUF_BASE	0x03010000
#define QMC_RXBUF_BASE  0x03010000
#define QMC_TXBUF_BASE  0x03080000
#define LOGICCMAX       32 /* 收发各32路 */
#define REMOTECMAX      16 /* 收发各16路 */
#define HDLCCHANNELMAX  6 /* 收发各48路 */
#define QMCINTMAX       6

#define MHRXBDNUM		16
#define MHTXBDNUM		16
#define MSGLEN        	64

typedef struct bd{
	UINT16 		sc;    	/* Status and control */
	UINT16 		len;  	/* Data length */
    UINT8  	   *addr;	/* buffer pointer */
}BD;


typedef struct extRam
{
   BD 	qmcTxBD[HDLCCHANNELMAX][MHTXBDNUM];
   BD 	qmcRxBD[HDLCCHANNELMAX][MHRXBDNUM];
}MHEXTRAM;


/* all changed on 2000.8.3 below */
/* offset from DPRAM of SMC's BDs */

#define SMC1_TBD_OFF		0x1DC0
#define SMC1_RBD_OFF		0x0C00
#define SMC1_TX_BUF_OFF		0x0D00
#define SMC1_RX_BUF_OFF		0x0D80
 
#define SCC3_TBD_OFF		0x1FC0
#define SCC3_RBD_OFF		0x0C80
#define SCC3_TX_BUF_OFF		0x0E00
#define SCC3_RX_BUF_OFF		0x0E80

/* number of SMC's BDs */
#define UART_TBD_NUM		0x01
#define UART_RBD_NUM		0x10

/* size of the UART transmit buffer */

#define UART_TX_BUF_SZ		0x01

/***** SCCE  SCC Event register *****/
#define	SCCE_IQOV		0x0008		
#define	SCCE_GINT		0x0004		
#define SCCE_GUN		0x0002		
#define SCCE_GOV	    0x0001		

/********* INT table entry *********/
#define INTTBL_V  		0x8000
#define INTTBL_W  		0x4000
#define INTTBL_NID  	0x2000
#define INTTBL_IDL  	0x1000
#define INTTBL_CH_NUM 	0x07c0 
#define INTTBL_MRF  	0x0020
#define INTTBL_UN    0x0010
#define INTTBL_RXF  	0x0008
#define INTTBL_BSY   0x0004
#define INTTBL_TXB  	0x0002
#define INTTBL_RXB   0x0001
/******* Buffer Descriptor *******/
#define RXBD_E          0x8000
#define RXBD_W          0x2000
#define RXBD_I          0x1000
#define RXBD_L          0x0800
#define RXBD_F          0x0400
#define RXBD_BAD_FACT   0x023c

#define TXBD_R          0x8000 /* Ready for transmission */
#define TXBD_W          0x2000 /* The last BD in TXBD table */
#define TXBD_I          0x1000 /* Data transmission can case an interrupt */
#define TXBD_L          0x0800 /* the last buffer in the current frame */
#define TXBD_TC         0x0400 /* Transmit the CRC sequence after the last data byte */
#define TXBD_CM         0x0200 /* Continuous mode */

#define PA0     0x8000
#define PA1     0x4000
#define PA2     0x2000
#define PA3     0x1000
#define PA4     0x0800
#define PA5     0x0400
#define PA6     0x0200
#define PA7     0x0100
#define PA8     0x0080
#define PA9     0x0040
#define PA10    0x0020
#define PA11    0x0010
#define PA12    0x0008
#define PA13    0x0004
#define PA14    0x0002
#define PA15    0x0001

#define PB14    0x00020000
#define PB15    0x00010000
#define PB16    0x00008000
#define PB17    0x00004000
#define PB18    0x00002000
#define PB19    0x00001000
#define PB20    0x00000800
#define PB21    0x00000400
#define PB22    0x00000200
#define PB23    0x00000100
#define PB24    0x00000080
#define PB25    0x00000040
#define PB26    0x00000020
#define PB27    0x00000010
#define PB28    0x00000008
#define PB29    0x00000004
#define PB30    0x00000002
#define PB31    0x00000001

#define PC4     0x0800
#define PC5     0x0400
#define PC6     0x0200
#define PC7     0x0100
#define PC8     0x0080
#define PC9     0x0040
#define PC10    0x0020
#define PC11    0x0010
#define PC12    0x0008
#define PC13    0x0004
#define PC14    0x0002
#define PC15    0x0001

#define PD3     0x1000
#define PD4     0x0800
#define PD5     0x0400
#define PD6     0x0200
#define PD7     0x0100
#define PD8     0x0080
#define PD9     0x0040
#define PD10    0x0020
#define PD11    0x0010
#define PD12    0x0008
#define PD13    0x0004
#define PD14    0x0002
#define PD15    0x0001



#endif /* __INCmpc860ph */