shell__state.h

xilinx3s400开发板厂家光盘带源码。state状态机、reg

////////////////////////////////////////////////////////////////////////////////
//   ____  ____  
//  /   /\/   /  
// /___/  \  /   
// \   \   \/    
//  \   \        Copyright (c) 2003-2004 Xilinx, Inc.
//  /   /        All Right Reserved. 
// /___/   /\   
// \   \  /  \  
//  \___\/\___\ 
////////////////////////////////////////////////////////////////////////////////

#ifndef H_workMshell__state_H
#define H_workMshell__state_H

#ifdef _MSC_VER
#pragma warning(disable: 4355)
#endif

#ifdef __MINGW32__
#include "xsimMinGW.h"
#else
#include "xsim.h"
#endif

class workMshell__state : public HSim__s5{
public: 
    workMshell__state(const char *instname);
    ~workMshell__state();
    void setDefparam();
    void constructObject();
    void moduleInstantiate(HSimConfigDecl *cfg);
    void connectSigs();
    virtual void archImplement();
    HSim__s3 u0;
    HSim__s3 u1;
    HSim__s3 u2;
    HSim__s3 u3;
    HSim__s3 u4;
    HSim__s3 u5;
    HSim__s3 u6;
    HSim__s3 u7;
    HSim__s3 u8;
    HSim__s3 u9;
    HSim__s3 u10;
    HSim__s3 u11;
    HSim__s3 u12;
    HSim__s3 u13;
    HSim__s3 u14;
    HSim__s3 u15;
    HSim__s3 u16;
    HSim__s3 u17;
    HSim__s3 u18;
    HSim__s3 u19;
    HSim__s3 u20;
    HSim__s3 u21;
    HSim__s3 u22;
    HSim__s3 u23;
    HSim__s3 u24;
    HSim__s3 u25;
    HSim__s3 u26;
    HSim__s3 u27;
    HSim__s3 u28;
    HSim__s3 u29;
    HSim__s3 u30;
    HSim__s3 u31;
    HSim__s3 u32;
    HSim__s3 u33;
    HSim__s3 u34;
    HSim__s3 u35;
    HSim__s3 u36;
    HSim__s3 u37;
    HSim__s3 u38;
    HSim__s3 u39;
    HSim__s3 u40;
    HSim__s3 u41;
    HSim__s3 u42;
    HSim__s3 u43;
    HSim__s3 u44;
    HSim__s3 u45;
    HSim__s3 u46;
    HSim__s3 u47;
    HSim__s3 u48;
    HSim__s3 u49;
    HSim__s3 u50;
    HSim__s3 u51;
    HSim__s3 u52;
    HSim__s3 u53;
    HSim__s3 u54;
    HSim__s3 u55;
    HSim__s3 u56;
    HSim__s3 u57;
    HSim__s3 u58;
    HSim__s3 u59;
    HSim__s3 u60;
    HSim__s3 u61;
    HSim__s3 u62;
    HSim__s3 u63;
    HSim__s3 u64;
    HSim__s2 *driver_us0;
    HSim__s2 *driver_us1;
    HSim__s2 *driver_us2;
    HSim__s2 *driver_us3;
    HSim__s2 *driver_us4;
    HSim__s2 *driver_us5;
    HSim__s3 u65;
    HSim__s2 *driver_us6;
    HSim__s3 u66;
    HSim__s2 *driver_us7;
    HSim__s3 u67;
    HSim__s3 u68;
    HSim__s3 u69;
    HSim__s3 u70;
    HSim__s3 u71;
    HSim__s3 u72;
    HSim__s1 us[10];
};

#endif