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📄 tvp5150.c

📁 linux tvp5150 driver the is ok for test
💻 C
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	},	{ /* 0x14 */		TVP5150_ACT_VD_CROP_STP_LSB,0x00	//Active Video Cropping Stop Pixel LSB Register	},	{ /* 0x15 */		TVP5150_GENLOCK,0x01				//Genlock and RTC Register	},	{ /* 0x16 */		TVP5150_HORIZ_SYNC_START,0x80		//Horizontal Sync (HSYNC) Start Register	},	{ /* 0x18 */		TVP5150_VERT_BLANKING_START,0x00   //Vertical Blanking Start Register	},	{ /* 0x19 */		TVP5150_VERT_BLANKING_STOP,0x00		//Vertical Blanking Stop Register	},	{ /* 0x1a */		TVP5150_CHROMA_PROC_CTL_1,0x0c		//Chrominance Control #1 Register	},	{ /* 0x1b */		TVP5150_CHROMA_PROC_CTL_2,0x14		//Chrominance Control #2 Register	},	{ /* 0x1c */		TVP5150_INT_RESET_REG_B,0x00		//Interrupt Reset Register B	},	{ /* 0x1d */		TVP5150_INT_ENABLE_REG_B,0x00		//Interrupt Enable Register B	},	{ /* 0x1e */		TVP5150_INTT_CONFIG_REG_B,0x00		//Interrupt Configuration Register B	},	{ /* 0x28 */		TVP5150_VIDEO_STD,0x00				//Video Standard Register	},	{ /* 0x2e */		TVP5150_MACROVISION_ON_CTR,0x0f		//Macrovision On Counter Register	},	{ /* 0x2f */		TVP5150_MACROVISION_OFF_CTR,0x01	//Macrovision Off Counter Register	},	{ /* 0xbb */		TVP5150_TELETEXT_FIL_ENA,0x00		//Teletext Filter Control Register	},	{ /* 0xc0 */		TVP5150_INT_STATUS_REG_A,0x00		//Interrupt Status Register A	},	{ /* 0xc1 */		TVP5150_INT_ENABLE_REG_A,0x00		//Interrupt Enable Register A	},	{ /* 0xc2 */		TVP5150_INT_CONF,0x04				//Interrupt Configuration Register A	},	{ /* 0xc8 */		TVP5150_FIFO_INT_THRESHOLD,0x80		//FIFO Interrupt Threshold Register	},	{ /* 0xc9 */		TVP5150_FIFO_RESET,0x00				//FIFO Reset Register	},	{ /* 0xca */		TVP5150_LINE_NUMBER_INT,0x00		//Line Number Interrupt Register	},	{ /* 0xcb */		TVP5150_PIX_ALIGN_REG_LOW,0x4e		//Pixel Alignment Registers	},	{ /* 0xcc */		TVP5150_PIX_ALIGN_REG_HIGH,0x00		//Pixel Alignment Registers	},	{ /* 0xcd */		TVP5150_FIFO_OUT_CTRL,0x01			//FIFO Output Control Register	},	{ /* 0xcf */		TVP5150_FULL_FIELD_ENA,0x00			//Full Field Enable Register	},	{ /* 0xd0 */		TVP5150_LINE_MODE_INI,0x00			//Line Mode Registers	},	{ /* 0xfc */		TVP5150_FULL_FIELD_MODE_REG,0x7f	//Full Field Mode Register	},	{ /* end of data */		0xff,0xff	}};/* Default values as sugested at TVP5150AM1 datasheet */static const struct i2c_reg_value tvp5150_init_enable[] = {	{		TVP5150_CONF_SHARED_PIN, 2	},{	/* Automatic offset and AGC enabled */		TVP5150_ANAL_CHL_CTL, 0x15	},{	/* Activate YCrCb output 0x9 or 0xd ? */		TVP5150_MISC_CTL, 0x6f								/*esion define 6f to 6d best */	},{	/* Activates video std autodetection for all standards */		TVP5150_AUTOSW_MSK, 0x0	},{	/* Default format: 0x47. For 4:2:2: 0x40 */		TVP5150_DATA_RATE_SEL, 0x47		//8bit ITU-R BT656;    /*esion define 0x40 YUV 422*/	},{		TVP5150_CHROMA_PROC_CTL_1, 0x0c	},{		TVP5150_CHROMA_PROC_CTL_2, 0x54	},{	/* Non documented, but initialized on WinTV USB2 */		0x27, 0x20	},{		0xff,0xff	}};struct tvp5150_vbi_type {	unsigned int vbi_type;	unsigned int ini_line;	unsigned int end_line;	unsigned int by_field :1;};struct i2c_vbi_ram_value {	u16 reg;	struct tvp5150_vbi_type type;	unsigned char values[16];};/* This struct have the values for each supported VBI Standard * by tvp5150_vbi_types should follow the same order as vbi_ram_default * value 0 means rom position 0x10, value 1 means rom position 0x30 * and so on. There are 16 possible locations from 0 to 15. */static struct i2c_vbi_ram_value vbi_ram_default[] ={	/* FIXME: Current api doesn't handle all VBI types, those not	   yet supported are placed under #if 0 */#if 0	{0x010, /* Teletext, SECAM, WST System A */		{V4L2_SLICED_TELETEXT_SECAM,6,23,1},		{ 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26,		  0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 }	},#endif	{0x030, /* Teletext, PAL, WST System B */		{V4L2_SLICED_TELETEXT_B,6,22,1},		{ 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b,		  0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 }	},#if 0	{0x050, /* Teletext, PAL, WST System C */		{V4L2_SLICED_TELETEXT_PAL_C,6,22,1},		{ 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,		  0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }	},	{0x070, /* Teletext, NTSC, WST System B */		{V4L2_SLICED_TELETEXT_NTSC_B,10,21,1},		{ 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23,		  0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }	},	{0x090, /* Tetetext, NTSC NABTS System C */		{V4L2_SLICED_TELETEXT_NTSC_C,10,21,1},		{ 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,		  0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 }	},	{0x0b0, /* Teletext, NTSC-J, NABTS System D */		{V4L2_SLICED_TELETEXT_NTSC_D,10,21,1},		{ 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23,		  0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }	},	{0x0d0, /* Closed Caption, PAL/SECAM */		{V4L2_SLICED_CAPTION_625,22,22,1},		{ 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,		  0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }	},#endif	{0x0f0, /* Closed Caption, NTSC */		{V4L2_SLICED_CAPTION_525,21,21,1},		{ 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,		  0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }	},	{0x110, /* Wide Screen Signal, PAL/SECAM */		{V4L2_SLICED_WSS_625,23,23,1},		{ 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42,		  0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 }	},#if 0	{0x130, /* Wide Screen Signal, NTSC C */		{V4L2_SLICED_WSS_525,20,20,1},		{ 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43,		  0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 }	},	{0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */		{V4l2_SLICED_VITC_625,6,22,0},		{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,		  0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }	},	{0x170, /* Vertical Interval Timecode (VITC), NTSC */		{V4l2_SLICED_VITC_525,10,20,0},		{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,		  0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }	},#endif	{0x190, /* Video Program System (VPS), PAL */		{V4L2_SLICED_VPS,16,16,0},		{ 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d,		  0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 }	},	/* 0x1d0 User programmable */	/* End of struct */	{ (u16)-1 }};static int tvp5150_write_inittab(struct i2c_client *c,				const struct i2c_reg_value *regs){	while (regs->reg != 0xff) {		tvp5150_write(c, regs->reg, regs->value);		regs++;	}	return 0;}static int tvp5150_vdp_init(struct i2c_client *c,				const struct i2c_vbi_ram_value *regs){	unsigned int i;	/* Disable Full Field */	tvp5150_write(c, TVP5150_FULL_FIELD_ENA, 0);	/* Before programming, Line mode should be at 0xff */	for (i=TVP5150_LINE_MODE_INI; i<=TVP5150_LINE_MODE_END; i++)		tvp5150_write(c, i, 0xff);	/* Load Ram Table */	while (regs->reg != (u16)-1 ) {		tvp5150_write(c, TVP5150_CONF_RAM_ADDR_HIGH,regs->reg>>8);		tvp5150_write(c, TVP5150_CONF_RAM_ADDR_LOW,regs->reg);		for (i=0;i<16;i++)			tvp5150_write(c, TVP5150_VDP_CONF_RAM_DATA,regs->values[i]);		regs++;	}	return 0;}/* Fills VBI capabilities based on i2c_vbi_ram_value struct */static void tvp5150_vbi_get_cap(const struct i2c_vbi_ram_value *regs,				struct v4l2_sliced_vbi_cap *cap){	int line;	memset(cap, 0, sizeof *cap);	while (regs->reg != (u16)-1 ) {		for (line=regs->type.ini_line;line<=regs->type.end_line;line++) {			cap->service_lines[0][line] |= regs->type.vbi_type;		}		cap->service_set |= regs->type.vbi_type;		regs++;	}}/* Set vbi processing * type - one of tvp5150_vbi_types * line - line to gather data * fields: bit 0 field1, bit 1, field2 * flags (default=0xf0) is a bitmask, were set means: *	bit 7: enable filtering null bytes on CC *	bit 6: send data also to FIFO *	bit 5: don't allow data with errors on FIFO *	bit 4: enable ECC when possible * pix_align = pix alignment: *	LSB = field1 *	MSB = field2 */static int tvp5150_set_vbi(struct i2c_client *c,			const struct i2c_vbi_ram_value *regs,			unsigned int type,u8 flags, int line,			const int fields){	struct tvp5150 *decoder = i2c_get_clientdata(c);	v4l2_std_id std=decoder->norm;	u8 reg;	int pos=0;	if (std == V4L2_STD_ALL) {		tvp5150_err("VBI can't be configured without knowing number of lines\n");		return 0;	} else if (std && V4L2_STD_625_50) {		/* Don't follow NTSC Line number convension */		line += 3;	}	if (line<6||line>27)		return 0;	while (regs->reg != (u16)-1 ) {		if ((type & regs->type.vbi_type) &&		    (line>=regs->type.ini_line) &&		    (line<=regs->type.end_line)) {			type=regs->type.vbi_type;			break;		}		regs++;		pos++;	}	if (regs->reg == (u16)-1)		return 0;	type=pos | (flags & 0xf0);	reg=((line-6)<<1)+TVP5150_LINE_MODE_INI;	if (fields&1) {		tvp5150_write(c, reg, type);	}	if (fields&2) {		tvp5150_write(c, reg+1, type);	}	return type;}static int tvp5150_get_vbi(struct i2c_client *c,			const struct i2c_vbi_ram_value *regs, int line){	struct tvp5150 *decoder = i2c_get_clientdata(c);	v4l2_std_id std=decoder->norm;	u8 reg;	int pos, type=0;	if (std == V4L2_STD_ALL) {		tvp5150_err("VBI can't be configured without knowing number of lines\n");		return 0;	} else if (std && V4L2_STD_625_50) {		/* Don't follow NTSC Line number convension */		line += 3;	}	if (line<6||line>27)		return 0;	reg=((line-6)<<1)+TVP5150_LINE_MODE_INI;	pos=tvp5150_read(c, reg)&0x0f;	if (pos<0x0f)		type=regs[pos].type.vbi_type;	pos=tvp5150_read(c, reg+1)&0x0f;	if (pos<0x0f)		type|=regs[pos].type.vbi_type;	return type;}static int tvp5150_set_std(struct i2c_client *c, v4l2_std_id std){	struct tvp5150 *decoder = i2c_get_clientdata(c);	int fmt=0;	decoder->norm=std;	/* First tests should be against specific std */	if (std == V4L2_STD_ALL) {		fmt=0;	/* Autodetect mode */	} else if (std & V4L2_STD_NTSC_443) {		fmt=0xa;	} else if (std & V4L2_STD_PAL_M) {		fmt=0x6;	} else if (std & (V4L2_STD_PAL_N| V4L2_STD_PAL_Nc)) {		fmt=0x8;	} else {		/* Then, test against generic ones */		if (std & V4L2_STD_NTSC) {			fmt=0x2;		} else if (std & V4L2_STD_PAL) {			fmt=0x4;		} else if (std & V4L2_STD_SECAM) {			fmt=0xc;		}	}	tvp5150_dbg(1,"Set video std register to %d.\n",fmt);	tvp5150_write(c, TVP5150_VIDEO_STD, fmt);	return 0;}static inline void tvp5150_reset(struct i2c_client *c){	u8 msb_id, lsb_id, msb_rom, lsb_rom;	struct tvp5150 *decoder = i2c_get_clientdata(c);	msb_id=tvp5150_read(c,TVP5150_MSB_DEV_ID);	lsb_id=tvp5150_read(c,TVP5150_LSB_DEV_ID);	msb_rom=tvp5150_read(c,TVP5150_ROM_MAJOR_VER);	lsb_rom=tvp5150_read(c,TVP5150_ROM_MINOR_VER);	if ((msb_rom==4)&&(lsb_rom==0)) { /* Is TVP5150AM1 */

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