misc.s
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S
1,514 行
mffs 0 /* save new fpscr value */ stfd 0,0(r5) blr/* * identify_cpu and calls setup_cpu * In: r3 = base of the cpu_specs array * r4 = address of cur_cpu_spec * r5 = relocation offset */_GLOBAL(identify_cpu) mfpvr r71: lwz r8,CPU_SPEC_PVR_MASK(r3) and r8,r8,r7 lwz r9,CPU_SPEC_PVR_VALUE(r3) cmplw 0,r9,r8 beq 1f addi r3,r3,CPU_SPEC_ENTRY_SIZE b 1b1: add r0,r3,r5 std r0,0(r4) ld r4,CPU_SPEC_SETUP(r3) sub r4,r4,r5 ld r4,0(r4) sub r4,r4,r5 mtctr r4 /* Calling convention for cpu setup is r3=offset, r4=cur_cpu_spec */ mr r4,r3 mr r3,r5 bctr/* * do_cpu_ftr_fixups - goes through the list of CPU feature fixups * and writes nop's over sections of code that don't apply for this cpu. * r3 = data offset (not changed) */_GLOBAL(do_cpu_ftr_fixups) /* Get CPU 0 features */ LOADADDR(r6,cur_cpu_spec) sub r6,r6,r3 ld r4,0(r6) sub r4,r4,r3 ld r4,CPU_SPEC_FEATURES(r4) /* Get the fixup table */ LOADADDR(r6,__start___ftr_fixup) sub r6,r6,r3 LOADADDR(r7,__stop___ftr_fixup) sub r7,r7,r3 /* Do the fixup */1: cmpld r6,r7 bgelr addi r6,r6,32 ld r8,-32(r6) /* mask */ and r8,r8,r4 ld r9,-24(r6) /* value */ cmpld r8,r9 beq 1b ld r8,-16(r6) /* section begin */ ld r9,-8(r6) /* section end */ subf. r9,r8,r9 beq 1b /* write nops over the section of code */ /* todo: if large section, add a branch at the start of it */ srwi r9,r9,2 mtctr r9 sub r8,r8,r3 lis r0,0x60000000@h /* nop */3: stw r0,0(r8) andi. r10,r4,CPU_FTR_SPLIT_ID_CACHE@l beq 2f dcbst 0,r8 /* suboptimal, but simpler */ sync icbi 0,r82: addi r8,r8,4 bdnz 3b sync /* additional sync needed on g4 */ isync b 1b#if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE)/* * Do an IO access in real mode */_GLOBAL(real_readb) mfmsr r7 ori r0,r7,MSR_DR xori r0,r0,MSR_DR sync mtmsrd r0 sync isync mfspr r6,SPRN_HID4 rldicl r5,r6,32,0 ori r5,r5,0x100 rldicl r5,r5,32,0 sync mtspr SPRN_HID4,r5 isync slbia isync lbz r3,0(r3) sync mtspr SPRN_HID4,r6 isync slbia isync mtmsrd r7 sync isync blr /* * Do an IO access in real mode */_GLOBAL(real_writeb) mfmsr r7 ori r0,r7,MSR_DR xori r0,r0,MSR_DR sync mtmsrd r0 sync isync mfspr r6,SPRN_HID4 rldicl r5,r6,32,0 ori r5,r5,0x100 rldicl r5,r5,32,0 sync mtspr SPRN_HID4,r5 isync slbia isync stb r3,0(r4) sync mtspr SPRN_HID4,r6 isync slbia isync mtmsrd r7 sync isync blr#endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) *//* * Create a kernel thread * kernel_thread(fn, arg, flags) */_GLOBAL(kernel_thread) std r29,-24(r1) std r30,-16(r1) stdu r1,-STACK_FRAME_OVERHEAD(r1) mr r29,r3 mr r30,r4 ori r3,r5,CLONE_VM /* flags */ oris r3,r3,(CLONE_UNTRACED>>16) li r4,0 /* new sp (unused) */ li r0,__NR_clone sc cmpdi 0,r3,0 /* parent or child? */ bne 1f /* return if parent */ li r0,0 stdu r0,-STACK_FRAME_OVERHEAD(r1) ld r2,8(r29) ld r29,0(r29) mtlr r29 /* fn addr in lr */ mr r3,r30 /* load arg and call fn */ blrl li r0,__NR_exit /* exit after child exits */ li r3,0 sc1: addi r1,r1,STACK_FRAME_OVERHEAD ld r29,-24(r1) ld r30,-16(r1) blr/* * disable_kernel_fp() * Disable the FPU. */_GLOBAL(disable_kernel_fp) mfmsr r3 rldicl r0,r3,(63-MSR_FP_LG),1 rldicl r3,r0,(MSR_FP_LG+1),0 mtmsrd r3 /* disable use of fpu now */ isync blr/* * giveup_fpu(tsk) * Disable FP for the task given as the argument, * and save the floating-point registers in its thread_struct. * Enables the FPU for use in the kernel on return. */_GLOBAL(giveup_fpu) mfmsr r5 ori r5,r5,MSR_FP mtmsrd r5 /* enable use of fpu now */ isync cmpdi 0,r3,0 beqlr- /* if no previous owner, done */ addi r3,r3,THREAD /* want THREAD of task */ ld r5,PT_REGS(r3) cmpdi 0,r5,0 SAVE_32FPRS(0, r3) mffs fr0 stfd fr0,THREAD_FPSCR(r3) beq 1f ld r4,_MSR-STACK_FRAME_OVERHEAD(r5) li r3,MSR_FP|MSR_FE0|MSR_FE1 andc r4,r4,r3 /* disable FP for previous task */ std r4,_MSR-STACK_FRAME_OVERHEAD(r5)1:#ifndef CONFIG_SMP li r5,0 ld r4,last_task_used_math@got(r2) std r5,0(r4)#endif /* CONFIG_SMP */ blr#ifdef CONFIG_ALTIVEC#if 0 /* this has no callers for now *//* * disable_kernel_altivec() * Disable the VMX. */_GLOBAL(disable_kernel_altivec) mfmsr r3 rldicl r0,r3,(63-MSR_VEC_LG),1 rldicl r3,r0,(MSR_VEC_LG+1),0 mtmsrd r3 /* disable use of VMX now */ isync blr#endif /* 0 *//* * giveup_altivec(tsk) * Disable VMX for the task given as the argument, * and save the vector registers in its thread_struct. * Enables the VMX for use in the kernel on return. */_GLOBAL(giveup_altivec) mfmsr r5 oris r5,r5,MSR_VEC@h mtmsrd r5 /* enable use of VMX now */ isync cmpdi 0,r3,0 beqlr- /* if no previous owner, done */ addi r3,r3,THREAD /* want THREAD of task */ ld r5,PT_REGS(r3) cmpdi 0,r5,0 SAVE_32VRS(0,r4,r3) mfvscr vr0 li r4,THREAD_VSCR stvx vr0,r4,r3 beq 1f ld r4,_MSR-STACK_FRAME_OVERHEAD(r5) lis r3,MSR_VEC@h andc r4,r4,r3 /* disable FP for previous task */ std r4,_MSR-STACK_FRAME_OVERHEAD(r5)1:#ifndef CONFIG_SMP li r5,0 ld r4,last_task_used_altivec@got(r2) std r5,0(r4)#endif /* CONFIG_SMP */ blr#endif /* CONFIG_ALTIVEC */_GLOBAL(__setup_cpu_power3) blr/* kexec_wait(phys_cpu) * * wait for the flag to change, indicating this kernel is going away but * the slave code for the next one is at addresses 0 to 100. * * This is used by all slaves. * * Physical (hardware) cpu id should be in r3. */_GLOBAL(kexec_wait) bl 1f1: mflr r5 addi r5,r5,kexec_flag-1b99: HMT_LOW#ifdef CONFIG_KEXEC /* use no memory without kexec */ lwz r4,0(r5) cmpwi 0,r4,0 bnea 0x60#endif b 99b/* this can be in text because we won't change it until we are * running in real anyways */kexec_flag: .long 0#ifdef CONFIG_KEXEC/* kexec_smp_wait(void) * * call with interrupts off * note: this is a terminal routine, it does not save lr * * get phys id from paca * set paca id to -1 to say we got here * switch to real mode * join other cpus in kexec_wait(phys_id) */_GLOBAL(kexec_smp_wait) lhz r3,PACAHWCPUID(r13) li r4,-1 sth r4,PACAHWCPUID(r13) /* let others know we left */ bl real_mode b .kexec_wait/* * switch to real mode (turn mmu off) * we use the early kernel trick that the hardware ignores bits * 0 and 1 (big endian) of the effective address in real mode * * don't overwrite r3 here, it is live for kexec_wait above. */real_mode: /* assume normal blr return */1: li r9,MSR_RI li r10,MSR_DR|MSR_IR mflr r11 /* return address to SRR0 */ mfmsr r12 andc r9,r12,r9 andc r10,r12,r10 mtmsrd r9,1 mtspr SPRN_SRR1,r10 mtspr SPRN_SRR0,r11 rfid/* * kexec_sequence(newstack, start, image, control, clear_all()) * * does the grungy work with stack switching and real mode switches * also does simple calls to other code */_GLOBAL(kexec_sequence) mflr r0 std r0,16(r1) /* switch stacks to newstack -- &kexec_stack.stack */ stdu r1,THREAD_SIZE-112(r3) mr r1,r3 li r0,0 std r0,16(r1) /* save regs for local vars on new stack. * yes, we won't go back, but ... */ std r31,-8(r1) std r30,-16(r1) std r29,-24(r1) std r28,-32(r1) std r27,-40(r1) std r26,-48(r1) std r25,-56(r1) stdu r1,-112-64(r1) /* save args into preserved regs */ mr r31,r3 /* newstack (both) */ mr r30,r4 /* start (real) */ mr r29,r5 /* image (virt) */ mr r28,r6 /* control, unused */ mr r27,r7 /* clear_all() fn desc */ mr r26,r8 /* spare */ lhz r25,PACAHWCPUID(r13) /* get our phys cpu from paca */ /* disable interrupts, we are overwriting kernel data next */ mfmsr r3 rlwinm r3,r3,0,17,15 mtmsrd r3,1 /* copy dest pages, flush whole dest image */ mr r3,r29 bl .kexec_copy_flush /* (image) */ /* turn off mmu */ bl real_mode /* clear out hardware hash page table and tlb */ ld r5,0(r27) /* deref function descriptor */ mtctr r5 bctrl /* ppc_md.hash_clear_all(void); *//* * kexec image calling is: * the first 0x100 bytes of the entry point are copied to 0 * * all slaves branch to slave = 0x60 (absolute) * slave(phys_cpu_id); * * master goes to start = entry point * start(phys_cpu_id, start, 0); * * * a wrapper is needed to call existing kernels, here is an approximate * description of one method: * * v2: (2.6.10) * start will be near the boot_block (maybe 0x100 bytes before it?) * it will have a 0x60, which will b to boot_block, where it will wait * and 0 will store phys into struct boot-block and load r3 from there, * copy kernel 0-0x100 and tell slaves to back down to 0x60 again * * v1: (2.6.9) * boot block will have all cpus scanning device tree to see if they * are the boot cpu ????? * other device tree differences (prop sizes, va vs pa, etc)... */ /* copy 0x100 bytes starting at start to 0 */ li r3,0 mr r4,r30 li r5,0x100 li r6,0 bl .copy_and_flush /* (dest, src, copy limit, start offset) */1: /* assume normal blr return */ /* release other cpus to the new kernel secondary start at 0x60 */ mflr r5 li r6,1 stw r6,kexec_flag-1b(5) mr r3,r25 # my phys cpu mr r4,r30 # start, aka phys mem offset mtlr 4 li r5,0 blr /* image->start(physid, image->start, 0); */#endif /* CONFIG_KEXEC *//* Why isn't this a) automatic, b) written in 'C'? */ .balign 8_GLOBAL(sys_call_table32) .llong .sys_restart_syscall /* 0 */ .llong .sys_exit .llong .ppc_fork .llong .sys_read .llong .sys_write .llong .compat_sys_open /* 5 */ .llong .sys_close .llong .sys32_waitpid .llong .sys32_creat .llong .sys_link .llong .sys_unlink /* 10 */ .llong .sys32_execve .llong .sys_chdir .llong .compat_sys_time .llong .sys_mknod .llong .sys_chmod /* 15 */ .llong .sys_lchown .llong .sys_ni_syscall /* old break syscall */ .llong .sys_ni_syscall /* old stat syscall */ .llong .ppc32_lseek .llong .sys_getpid /* 20 */ .llong .compat_sys_mount .llong .sys_oldumount .llong .sys_setuid .llong .sys_getuid .llong .compat_sys_stime /* 25 */ .llong .sys32_ptrace .llong .sys_alarm .llong .sys_ni_syscall /* old fstat syscall */ .llong .sys32_pause .llong .compat_sys_utime /* 30 */ .llong .sys_ni_syscall /* old stty syscall */ .llong .sys_ni_syscall /* old gtty syscall */ .llong .sys32_access .llong .sys32_nice .llong .sys_ni_syscall /* 35 - old ftime syscall */ .llong .sys_sync .llong .sys32_kill .llong .sys_rename .llong .sys32_mkdir .llong .sys_rmdir /* 40 */ .llong .sys_dup .llong .sys_pipe .llong .compat_sys_times .llong .sys_ni_syscall /* old prof syscall */ .llong .sys_brk /* 45 */ .llong .sys_setgid .llong .sys_getgid .llong .sys_signal .llong .sys_geteuid .llong .sys_getegid /* 50 */ .llong .sys_acct .llong .sys_umount .llong .sys_ni_syscall /* old lock syscall */ .llong .compat_sys_ioctl .llong .compat_sys_fcntl /* 55 */
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