📄 rtl8019.lst
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C51 COMPILER V7.06 RTL8019 08/08/2007 10:09:40 PAGE 1
C51 COMPILER V7.06, COMPILATION OF MODULE RTL8019
OBJECT MODULE PLACED IN E:\NETBRO~1\TRUNK\NETBRO~1\RTL8019\RTL8019.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE E:\NETBRO~1\TRUNK\NETBRO~1\RTL8019\RTL8019.C DB SB OE
stmt level source
1 /*
2 */
3 #include "reg51.h"
4 #include "config.h"
5 #include "GloblDef.h"
6 #include "TCPIPmem.h"
7 #include "RTL8019.h"
8 #include <stdio.h>
9 #include <absacc.h>
10
11 #define RTLBaseAddr 0x8000
12
13 /* to prevent call RTLSendPacket() when RTLSendPackt() is already is called, InSending
14 is used. example when process run in RTLSendPacket() and a interrupt ocurr then call
15 RTLSendPacket again, then the Register would have changed when interrupt return. */
16 static unsigned char xdata InSending;
17
18 static unsigned char xdata StartPageOfPacket;
19 /* receive head information */
20 /*struct RTLReceiveHeader
21 {
22 unsigned char ReceiveStatus;
23 unsigned char NextPacketStartPage;
24 unsigned char PacketSizeLow;
25 unsigned char PacketSizeHigh;
26 }Head;for some unknown resean Head must be a gloal value. */
27 static unsigned char xdata Head[4];
28
29 /* last trasmit start page */
30 static unsigned char xdata LastSendStartPage;
31
32 /****************************************************************************
33 * 名称：WriteReg()
34 * 功能：把数据写入RTL8019AS
35 * 入口参数： chPort 写入地址
36 chValue 写入数据
37 * 出口参数：无
38 ****************************************************************************/
39 void WriteReg(unsigned char chPort,unsigned char chValue)
40 {
41 1 unsigned char xdata chWriteRegTmp = 0;
42 1 volatile unsigned int RTLAddr = 0;
43 1
44 1 /*
45 1 //方法一
46 1 (*((volatile unsigned short *) RTLBaseAddr + chPort)) = chValue;
47 1 //to debug
48 1 chWriteRegTmp = (*((volatile unsigned short *) RTLBaseAddr + chPort));
49 1 */
50 1 //方法二
51 1 RTLAddr = RTLBaseAddr + chPort;
52 1 *(volatile unsigned char *)(RTLAddr) = chValue;
53 1 //to debug
54 1 chWriteRegTmp = *(volatile unsigned char *)(RTLAddr);
55 1
C51 COMPILER V7.06 RTL8019 08/08/2007 10:09:40 PAGE 2
56 1
57 1 }
58
59 /****************************************************************************
60 * 名称：ReadReg()
61 * 功能：从RTL8019AS把数据读出
62 * 入口参数： chPort 读出地址
63 * 出口参数： Read读出数据
64 ****************************************************************************/
65 unsigned char ReadReg(unsigned char chPort)
66 {
67 1 unsigned char xdata chReadRegTmp = 0;
68 1 volatile unsigned int RTLAddr = 0;
69 1 /*
70 1 //方法一
71 1 chReadRegTmp = (*((volatile unsigned short *)RTLBaseAddr + chPort));//0x83400000
72 1 return (chReadRegTmp); */
73 1
74 1 //方法二
75 1 RTLAddr = RTLBaseAddr + chPort;
76 1 chReadRegTmp = *(volatile unsigned char *)(RTLAddr);
77 1 return chReadRegTmp;
78 1
79 1 }
80 /**********************************************************************
81 **函数原型： void RTLPage(unsigned char chPageNum)
82 **入口参数:? unsigned char chPageNum: 要切换的页
83 **出口参数: 无
84 **返 回 值： 无
85 **说 明： 选择页,可选择0,1,2三页,第四页ne000兼容芯片保留,
86 set bit 7-6 in CR, CR_TXP must be 0(if 1 the packet is retrasmit)
87 ************************************************************************/
88 void RTLPage(unsigned char chPageNum)
89 {
90 1 unsigned char chTmp;
91 1 chTmp= ReadReg(0x00);//command register
92 1 chTmp = chTmp & 0x3B ;//注意txp位不能要
93 1 chPageNum = chPageNum << 6;
94 1 chTmp = chTmp | chPageNum;
95 1 WriteReg(0x00,chTmp);
96 1 }
97
98 /* reset rtl8019 and init registers, MacAddr is MAC address */
99 void RTL8019Init() reentrant
100 {
101 1 unsigned char chRTLInitTmp = 0;
102 1 unsigned int i = 0;
103 1
104 1 /* after hardware reset a longdelay is necessary for rtl to self-initial */
105 1 //在RSTDRV从高电平回到低电平之后的100MS时，在对RTL8019做读写操作，以确保完全复位
106 1 P35 = 1;
107 1 delay(200);
108 1 P35 = 0;
109 1 delay(200);
110 1
111 1 /* reset: write to reset prot */
112 1 WriteReg(0x1f,0xdd);
113 1 chRTLInitTmp = ReadReg(0x1f);
114 1 delay(200);
115 1
116 1 /* init RTL registers*/
117 1 WriteReg(0x00,0x21);
C51 COMPILER V7.06 RTL8019 08/08/2007 10:09:40 PAGE 3
118 1 chRTLInitTmp = ReadReg(0x00);
119 1 delay(200);
120 1
121 1 RTLPage(0);
122 1 //WriteReg(0x0a,0x00); //清RBCR0
123 1 //WriteReg(0x0b,0x00); //清RBCR1
124 1 //WriteReg(0x0c,0xe0); //RCR,监视模式，不接收数据报
125 1 //WriteReg(0x0d,0xe2); //TCR,loopback模式
126 1
127 1 WriteReg(0x01,0x4c); /* Pstart */
128 1 WriteReg(0x02,0x80); /* Pstop */
129 1 WriteReg(0x03,0x4c); /* BNRY */
130 1 WriteReg(0x04,0x40); /* TPSR */
131 1
132 1 //WriteReg(0x0c,0xcc); //RCR,
133 1 //WriteReg(0x0d,0xe0); //TCR,
134 1
135 1 //WriteReg(0x07,0xFF); /* ISR: Interrupt Status Register,write FF to clear up all interrupt status */
136 1 //WriteReg(0x0f,0x00); /* IMR: Interrupt Mask Register,屏蔽掉所有中断 */
137 1 WriteReg(0x0e,0xC8); /* DCR: Data Configuration Register*/
138 1
139 1 //WriteReg(0x0c,0xCE); /* RCR: */
140 1 //WriteReg(0x0d,0xE0); /* TCR: */
141 1
142 1 RTLPage(1);
143 1 WriteReg(0x07,0x4d); //CURR,设置为指向当前正在写的页的下一页
144 1
145 1 // MAR0
146 1 WriteReg(0x08,0x00);
147 1 WriteReg(0x09,0x41);
148 1 WriteReg(0x0a,0x00);
149 1 WriteReg(0x0b,0x80);
150 1 WriteReg(0x0c,0x00);
151 1 WriteReg(0x0d,0x00);
152 1 WriteReg(0x0e,0x00);
153 1 WriteReg(0x0f,0x00);
154 1
155 1 // set phisical address
156 1 WriteReg(0x01,0x52);
157 1 WriteReg(0x02,0x54);
158 1 WriteReg(0x03,0x4c);
159 1 WriteReg(0x06,0x30);
160 1 WriteReg(0x05,0x2e);
161 1 WriteReg(0x04,0x2f);
162 1 /*
163 1
164 1 //To debug
165 1 RTLPage(0);
166 1 chRTLInitTmp = ReadReg(0x08);
167 1 chRTLInitTmp = ReadReg(0x09);
168 1 chRTLInitTmp = ReadReg(0x0a);
169 1 chRTLInitTmp = ReadReg(0x0b);
170 1 chRTLInitTmp = ReadReg(0x0c);
171 1 chRTLInitTmp = ReadReg(0x0d);
172 1 chRTLInitTmp = ReadReg(0x0e);
173 1 chRTLInitTmp = ReadReg(0x0f);
174 1 //for(i = 0;i < 20000;i++);
175 1 chRTLInitTmp = ReadReg(0x03);
176 1 chRTLInitTmp = ReadReg(0x01);
177 1 chRTLInitTmp = ReadReg(0x02);
178 1 chRTLInitTmp = ReadReg(0x06);
179 1 chRTLInitTmp = ReadReg(0x05);
C51 COMPILER V7.06 RTL8019 08/08/2007 10:09:40 PAGE 4
180 1 chRTLInitTmp = ReadReg(0x04);
181 1
182 1 RTLPage(1);
183 1 //MAR0~7
184 1 chRTLInitTmp = ReadReg(0x08);
185 1 chRTLInitTmp = ReadReg(0x09);
186 1 chRTLInitTmp = ReadReg(0x0a);
187 1 chRTLInitTmp = ReadReg(0x0b);
188 1 chRTLInitTmp = ReadReg(0x0c);
189 1 chRTLInitTmp = ReadReg(0x0d);
190 1 chRTLInitTmp = ReadReg(0x0e);
191 1 chRTLInitTmp = ReadReg(0x0f);
192 1 //for(i = 0;i < 20000;i++);
193 1 //PAR0~5
194 1 chRTLInitTmp = ReadReg(0x03);
195 1 chRTLInitTmp = ReadReg(0x01);
196 1 chRTLInitTmp = ReadReg(0x02);
197 1 chRTLInitTmp = ReadReg(0x06);
198 1 chRTLInitTmp = ReadReg(0x05);
199 1 chRTLInitTmp = ReadReg(0x04); */
200 1
201 1 /* transimit start page */
202 1 LastSendStartPage = SEND_START_PAGE0;
203 1 StartPageOfPacket = RECEIVE_START_PAGE + 1;
204 1
205 1 /* in the beginning, no packet is in sending */
206 1 InSending = FALSE;
207 1
208 1 RTLPage(0);
209 1 /* initial over, start command and receive */
210 1 WriteReg(0x0c,0xcc); //将芯片置于正常模式，跟外部网络连接
211 1 WriteReg(0x0d,0xe0);
212 1 WriteReg(0x07,0xFF);
213 1 chRTLInitTmp = ReadReg(0x07); //清除所有中断标志位
214 1 //(CR_PAGE0 | CR_ABORT_COMPLETE_DMA | CR_START_COMMAND));
215 1 WriteReg(0x00,0x22);
216 1 }
217
218 /* write buffer to rlt ram */
219 void RTLWriteRam(unsigned int address, unsigned int size, unsigned char xdata * buff) reentrant
220 {
221 1 unsigned char xdata *Endp;
222 1 unsigned char PrePage; // store page
223 1 PrePage = ReadReg(0x00);//CR
224 1 RTLPage(0);
225 1 WriteReg(RSARH_WPAGE0,(unsigned char)((address>>8)&0x00ff));
226 1 WriteReg(RSARL_WPAGE0,(unsigned char)address);
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