lcd1602_driver.qsf

写给小白们的FPGA入门设计实验

# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2011 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II
# Version 11.0 Build 157 04/27/2011 SJ Full Version
# Date created = 05:25:26  June 26, 2011
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		lcd1602_driver_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus II software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C35F672C6
set_global_assignment -name TOP_LEVEL_ENTITY lcd1602_driver
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 11.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "05:25:26  JUNE 26, 2011"
set_global_assignment -name LAST_QUARTUS_VERSION "9.1 SP1"
set_global_assignment -name VERILOG_FILE src/lcd1602_driver.v
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 672
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 6
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_location_assignment PIN_N2 -to clk
set_location_assignment PIN_K4 -to lcd_rw
set_location_assignment PIN_K3 -to lcd_en
set_location_assignment PIN_K1 -to lcd_rs
set_location_assignment PIN_H3 -to lcd_data[7]
set_location_assignment PIN_H4 -to lcd_data[6]
set_location_assignment PIN_J3 -to lcd_data[5]
set_location_assignment PIN_J4 -to lcd_data[4]
set_location_assignment PIN_H2 -to lcd_data[3]
set_location_assignment PIN_H1 -to lcd_data[2]
set_location_assignment PIN_J2 -to lcd_data[1]
set_location_assignment PIN_J1 -to lcd_data[0]
set_location_assignment PIN_N25 -to rst_n
set_location_assignment PIN_L4 -to lcd_on
set_location_assignment PIN_K2 -to lcd_blon
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS16
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top