key_scan.v

写给小白们的FPGA入门设计实验

/*-------------------------------------------------------------------------
This confidential and proprietary software may be only used as authorized
by a licensing agreement from CrazyBingo.www.cnblogs.com/crazybingo
(C) COPYRIGHT 2012 CrazyBingo. ALL RIGHTS RESERVED
Filename			:		key_scan.v
Author				:		CrazyBingo
Data				:		2011-06-25
Version				:		1.0
Description			:		scan of key control.
Modification History	:
Data			By			Version			Change Description
===========================================================================
12/06/25		CrazyBingo	1.0				Original
--------------------------------------------------------------------------*/
module key_scan
#(
	parameter KEY_WIDTH = 2
)
(
	input						clk,	//50MHz
	input						rst_n,	
	input		[KEY_WIDTH-1:0]	key_data,	

	output						key_flag,
	output	reg	[KEY_WIDTH-1:0]	key_value	
);

//---------------------------------
//escape the jitters
reg [19:0]	key_cnt;	//scan counter
reg	[KEY_WIDTH-1:0]	key_data_r;
always @(posedge clk or negedge rst_n)
begin
	if(!rst_n)	
		begin
		key_data_r <= {KEY_WIDTH{1'b1}};
		key_cnt <= 0;
		end
	else 
		begin
		key_data_r <= key_data;								//lock the key value
		if((key_data == key_data_r) && (key_data != {KEY_WIDTH{1'b1}}))	//20ms escape jitter
			begin
			if(key_cnt < 20'hfffff)
				key_cnt <= key_cnt + 1'b1;
			end
		else//if(key_data != key_data_r || key_data ==2'b11)
			key_cnt <= 0;
		end
end
wire	cnt_flag = (key_cnt == 20'hffffe) ? 1'b1 : 1'b0;//!!

//-----------------------------------
//sure the key is pressed
reg	key_flag_r;
always@(posedge clk or negedge rst_n)
begin
	if(!rst_n)
		begin
		key_flag_r <= 0;
		key_value <= 0;
		end
	else if(cnt_flag)
		begin
		key_flag_r <= 1;
		key_value <= key_data;	//locked the data
		end
	else	//let go your hand
		key_flag_r <= 0;		//lock the key_value
end

//---------------------------------------
//Capture the rising endge of the key_flag
reg	key_flag_r0,key_flag_r1;
always@(posedge clk or negedge rst_n)
begin
	if(!rst_n)
		begin
		key_flag_r0 <= 0;
		key_flag_r1 <= 0;
		end
	else
		begin
		key_flag_r0 <= key_flag_r;
		key_flag_r1 <= key_flag_r0;
		end
end
assign	key_flag = ~key_flag_r1 & key_flag_r0;

endmodule