prev_cmp_calculator_design.qmsg

写给小白们的FPGA入门设计实验

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "adder_4bits adder_4bits:u_adder_4bits " "Info: Elaborating entity \"adder_4bits\" for hierarchy \"adder_4bits:u_adder_4bits\"" {  } { { "../src/Calculator_Design.v" "u_adder_4bits" { Text "D:/Altera_Project/LabTest/Calculator_Design/src/Calculator_Design.v" 89 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mult_4bits mult_4bits:u_mult_4bits " "Info: Elaborating entity \"mult_4bits\" for hierarchy \"mult_4bits:u_mult_4bits\"" {  } { { "../src/Calculator_Design.v" "u_mult_4bits" { Text "D:/Altera_Project/LabTest/Calculator_Design/src/Calculator_Design.v" 100 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "Seg7_lut Seg7_lut:u_Seg7_lut3 " "Info: Elaborating entity \"Seg7_lut\" for hierarchy \"Seg7_lut:u_Seg7_lut3\"" {  } { { "../src/Calculator_Design.v" "u_Seg7_lut3" { Text "D:/Altera_Project/LabTest/Calculator_Design/src/Calculator_Design.v" 156 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
{ "Info" "IOPT_MLS_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "../src/key_scan.v" "" { Text "D:/Altera_Project/LabTest/Calculator_Design/src/key_scan.v" 41 -1 0 } }  } 0 0 "Registers with preset signals will power-up high" 0 0 "" 0 -1}
{ "Info" "IOPT_MLS_DEV_CLRN_SETS_REGISTERS" "" "Info: DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" {  } {  } 0 0 "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_TM_SUMMARY" "250 " "Info: Implemented 250 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "16 " "Info: Implemented 16 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_OPINS" "28 " "Info: Implemented 28 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_LCELLS" "206 " "Info: Implemented 206 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 -1}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 2 s Quartus II 64-Bit " "Info: Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "266 " "Info: Peak virtual memory: 266 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Fri Nov 02 13:34:37 2012 " "Info: Processing ended: Fri Nov 02 13:34:37 2012" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Info: Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II 64-Bit " "Info: Running Quartus II 64-Bit Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.1 Build 304 01/25/2010 Service Pack 1 SJ Full Version " "Info: Version 9.1 Build 304 01/25/2010 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Fri Nov 02 13:34:38 2012 " "Info: Processing started: Fri Nov 02 13:34:38 2012" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off Calculator_Design -c Calculator_Design " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off Calculator_Design -c Calculator_Design" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "2 2 " "Info: Parallel compilation is enabled and will use 2 of the 2 processors detected" {  } {  } 0 0 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "" 0 -1}
{ "Info" "IMPP_MPP_USER_DEVICE" "Calculator_Design EP2C35F672C6 " "Info: Selected device EP2C35F672C6 for design \"Calculator_Design\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}