calculator_design.map.summary

来自「写给小白们的FPGA入门设计实验」· SUMMARY 代码 · 共 15 行

Analysis & Synthesis Status : Successful - Sat Nov 03 08:51:04 2012
Quartus II 64-Bit Version : 9.1 Build 304 01/25/2010 SP 1 SJ Full Version
Revision Name : Calculator_Design
Top-level Entity Name : Calculator_Design
Family : Cyclone II
Total logic elements : 205
    Total combinational functions : 191
    Dedicated logic registers : 51
Total registers : 51
Total pins : 44
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0