📄 clock.hif
字号:
Version 6.0 Build 178 04/27/2006 SJ Full Version
35
1731
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
clock
# storage
db|clock.(0).cnf
db|clock.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
clock.vhd
767b828e33da1fa7a76342827b94394
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# entity
input
# storage
db|clock.(1).cnf
db|clock.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
input.vhd
1fb6abfdcdc2b4b2a17dcd51f9c7a84
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
constraint(a)
2 downto 0
PARAMETER_STRING
USR
constraint(m1)
2 downto 0
PARAMETER_STRING
USR
constraint(c)
5 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
input:u1
}
# end
# entity
compare
# storage
db|clock.(2).cnf
db|clock.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
compare.vhd
6168c37dde3e214be740fe693aec5c1
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
constraint(d)
5 downto 0
PARAMETER_STRING
USR
constraint(f)
5 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
compare:u2
}
# end
# entity
flip
# storage
db|clock.(3).cnf
db|clock.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
flip.vhd
305fb9d5c5d27f48a74d39e2d674da3
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
constraint(h)
5 downto 0
PARAMETER_STRING
USR
constraint(m)
5 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
flip:u3
}
# end
# entity
output
# storage
db|clock.(4).cnf
db|clock.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
output.vhd
70a06367e698729e6c84f11151a6fa5
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
output:u4
}
# end
# complete
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