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📄 compare.tan.qmsg

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💻 QMSG
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Dec 16 20:02:47 2008 " "Info: Processing started: Tue Dec 16 20:02:47 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off compare -c compare --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off compare -c compare --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Warning" "WTDB_ANALYZE_COMB_LATCHES" "" "Warning: Timing Analysis is analyzing one or more combinational loops as latches" { { "Warning" "WTDB_COMB_LATCH_NODE" "f0\[0\] " "Warning: Node \"f0\[0\]\" is a latch" {  } { { "compare.vhd" "" { Text "C:/Documents and Settings/user/桌面/suo/compare.vhd" 15 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "f0\[1\] " "Warning: Node \"f0\[1\]\" is a latch" {  } { { "compare.vhd" "" { Text "C:/Documents and Settings/user/桌面/suo/compare.vhd" 15 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "f0\[2\] " "Warning: Node \"f0\[2\]\" is a latch" {  } { { "compare.vhd" "" { Text "C:/Documents and Settings/user/桌面/suo/compare.vhd" 15 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "f0\[3\] " "Warning: Node \"f0\[3\]\" is a latch" {  } { { "compare.vhd" "" { Text "C:/Documents and Settings/user/桌面/suo/compare.vhd" 15 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "f0\[4\] " "Warning: Node \"f0\[4\]\" is a latch" {  } { { "compare.vhd" "" { Text "C:/Documents and Settings/user/桌面/suo/compare.vhd" 15 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTDB_COMB_LATCH_NODE" "f0\[5\] " "Warning: Node \"f0\[5\]\" is a latch" {  } { { "compare.vhd" "" { Text "C:/Documents and Settings/user/桌面/suo/compare.vhd" 15 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0}  } {  } 0 0 "Timing Analysis is analyzing one or more combinational loops as latches" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node \"clk\" is an undefined clock" {  } { { "compare.vhd" "" { Text "C:/Documents and Settings/user/桌面/suo/compare.vhd" 5 -1 0 } } { "d:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "clk" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "ok " "Info: Assuming node \"ok\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "compare.vhd" "" { Text "C:/Documents and Settings/user/桌面/suo/compare.vhd" 5 -1 0 } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "clk " "Info: No valid register-to-register data paths exist for clock \"clk\"" {  } {  } 0 0 "No valid register-to-register data paths exist for clock \"%1!s!\"" 0 0}

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