mult.hier_info

基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件）

|mult
clock => lpm_mult:lpm_mult_component.clock
dataa[0] => lpm_mult:lpm_mult_component.dataa[0]
dataa[1] => lpm_mult:lpm_mult_component.dataa[1]
dataa[2] => lpm_mult:lpm_mult_component.dataa[2]
dataa[3] => lpm_mult:lpm_mult_component.dataa[3]
dataa[4] => lpm_mult:lpm_mult_component.dataa[4]
dataa[5] => lpm_mult:lpm_mult_component.dataa[5]
dataa[6] => lpm_mult:lpm_mult_component.dataa[6]
dataa[7] => lpm_mult:lpm_mult_component.dataa[7]
datab[0] => lpm_mult:lpm_mult_component.datab[0]
datab[1] => lpm_mult:lpm_mult_component.datab[1]
datab[2] => lpm_mult:lpm_mult_component.datab[2]
datab[3] => lpm_mult:lpm_mult_component.datab[3]
datab[4] => lpm_mult:lpm_mult_component.datab[4]
datab[5] => lpm_mult:lpm_mult_component.datab[5]
datab[6] => lpm_mult:lpm_mult_component.datab[6]
datab[7] => lpm_mult:lpm_mult_component.datab[7]
result[0] <= lpm_mult:lpm_mult_component.result[0]
result[1] <= lpm_mult:lpm_mult_component.result[1]
result[2] <= lpm_mult:lpm_mult_component.result[2]
result[3] <= lpm_mult:lpm_mult_component.result[3]
result[4] <= lpm_mult:lpm_mult_component.result[4]
result[5] <= lpm_mult:lpm_mult_component.result[5]
result[6] <= lpm_mult:lpm_mult_component.result[6]
result[7] <= lpm_mult:lpm_mult_component.result[7]
result[8] <= lpm_mult:lpm_mult_component.result[8]
result[9] <= lpm_mult:lpm_mult_component.result[9]
result[10] <= lpm_mult:lpm_mult_component.result[10]
result[11] <= lpm_mult:lpm_mult_component.result[11]
result[12] <= lpm_mult:lpm_mult_component.result[12]
result[13] <= lpm_mult:lpm_mult_component.result[13]
result[14] <= lpm_mult:lpm_mult_component.result[14]
result[15] <= lpm_mult:lpm_mult_component.result[15]


|mult|lpm_mult:lpm_mult_component
dataa[0] => mult_m5q:auto_generated.dataa[0]
dataa[1] => mult_m5q:auto_generated.dataa[1]
dataa[2] => mult_m5q:auto_generated.dataa[2]
dataa[3] => mult_m5q:auto_generated.dataa[3]
dataa[4] => mult_m5q:auto_generated.dataa[4]
dataa[5] => mult_m5q:auto_generated.dataa[5]
dataa[6] => mult_m5q:auto_generated.dataa[6]
dataa[7] => mult_m5q:auto_generated.dataa[7]
datab[0] => mult_m5q:auto_generated.datab[0]
datab[1] => mult_m5q:auto_generated.datab[1]
datab[2] => mult_m5q:auto_generated.datab[2]
datab[3] => mult_m5q:auto_generated.datab[3]
datab[4] => mult_m5q:auto_generated.datab[4]
datab[5] => mult_m5q:auto_generated.datab[5]
datab[6] => mult_m5q:auto_generated.datab[6]
datab[7] => mult_m5q:auto_generated.datab[7]
sum[0] => ~NO_FANOUT~
aclr => ~NO_FANOUT~
clock => mult_m5q:auto_generated.clock
clken => ~NO_FANOUT~
result[0] <= mult_m5q:auto_generated.result[0]
result[1] <= mult_m5q:auto_generated.result[1]
result[2] <= mult_m5q:auto_generated.result[2]
result[3] <= mult_m5q:auto_generated.result[3]
result[4] <= mult_m5q:auto_generated.result[4]
result[5] <= mult_m5q:auto_generated.result[5]
result[6] <= mult_m5q:auto_generated.result[6]
result[7] <= mult_m5q:auto_generated.result[7]
result[8] <= mult_m5q:auto_generated.result[8]
result[9] <= mult_m5q:auto_generated.result[9]
result[10] <= mult_m5q:auto_generated.result[10]
result[11] <= mult_m5q:auto_generated.result[11]
result[12] <= mult_m5q:auto_generated.result[12]
result[13] <= mult_m5q:auto_generated.result[13]
result[14] <= mult_m5q:auto_generated.result[14]
result[15] <= mult_m5q:auto_generated.result[15]


|mult|lpm_mult:lpm_mult_component|mult_m5q:auto_generated
clock => mac_mult2.CLK
clock => mac_mult2.CLK1
clock => mac_mult2.CLK2
clock => mac_mult2.CLK3
clock => mac_out1.CLK
clock => mac_out1.CLK1
clock => mac_out1.CLK2
clock => mac_out1.CLK3
dataa[0] => mac_mult2.DATAA
dataa[1] => mac_mult2.DATAA1
dataa[2] => mac_mult2.DATAA2
dataa[3] => mac_mult2.DATAA3
dataa[4] => mac_mult2.DATAA4
dataa[5] => mac_mult2.DATAA5
dataa[6] => mac_mult2.DATAA6
dataa[7] => mac_mult2.DATAA7
datab[0] => mac_mult2.DATAB
datab[1] => mac_mult2.DATAB1
datab[2] => mac_mult2.DATAB2
datab[3] => mac_mult2.DATAB3
datab[4] => mac_mult2.DATAB4
datab[5] => mac_mult2.DATAB5
datab[6] => mac_mult2.DATAB6
datab[7] => mac_mult2.DATAB7
result[0] <= mac_out1.DATAOUT
result[1] <= mac_out1.DATAOUT1
result[2] <= mac_out1.DATAOUT2
result[3] <= mac_out1.DATAOUT3
result[4] <= mac_out1.DATAOUT4
result[5] <= mac_out1.DATAOUT5
result[6] <= mac_out1.DATAOUT6
result[7] <= mac_out1.DATAOUT7
result[8] <= mac_out1.DATAOUT8
result[9] <= mac_out1.DATAOUT9
result[10] <= mac_out1.DATAOUT10
result[11] <= mac_out1.DATAOUT11
result[12] <= mac_out1.DATAOUT12
result[13] <= mac_out1.DATAOUT13
result[14] <= mac_out1.DATAOUT14
result[15] <= mac_out1.DATAOUT15