taxi.tan.qmsg

基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件）

{ "Info" "ITDB_TSU_RESULT" "money_reg\[6\]~_emulated speedup\[0\] clk 17.494 ns register " "Info: tsu for register \"money_reg\[6\]~_emulated\" (data pin = \"speedup\[0\]\", clock pin = \"clk\") is 17.494 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "20.342 ns + Longest pin register " "Info: + Longest pin to register delay is 20.342 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.944 ns) 0.944 ns speedup\[0\] 1 PIN PIN_113 13 " "Info: 1: + IC(0.000 ns) + CELL(0.944 ns) = 0.944 ns; Loc. = PIN_113; Fanout = 13; PIN Node = 'speedup\[0\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { speedup[0] } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(7.322 ns) + CELL(0.624 ns) 8.890 ns process0~215 2 COMB LCCOMB_X25_Y14_N20 3 " "Info: 2: + IC(7.322 ns) + CELL(0.624 ns) = 8.890 ns; Loc. = LCCOMB_X25_Y14_N20; Fanout = 3; COMB Node = 'process0~215'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "7.946 ns" { speedup[0] process0~215 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.710 ns) + CELL(0.651 ns) 10.251 ns process0~2 3 COMB LCCOMB_X26_Y14_N12 4 " "Info: 3: + IC(0.710 ns) + CELL(0.651 ns) = 10.251 ns; Loc. = LCCOMB_X26_Y14_N12; Fanout = 4; COMB Node = 'process0~2'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.361 ns" { process0~215 process0~2 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.815 ns) + CELL(0.370 ns) 12.436 ns dis~2907 4 COMB LCCOMB_X24_Y15_N10 1 " "Info: 4: + IC(1.815 ns) + CELL(0.370 ns) = 12.436 ns; Loc. = LCCOMB_X24_Y15_N10; Fanout = 1; COMB Node = 'dis~2907'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.185 ns" { process0~2 dis~2907 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.367 ns) + CELL(0.206 ns) 13.009 ns dis~2909 5 COMB LCCOMB_X24_Y15_N20 8 " "Info: 5: + IC(0.367 ns) + CELL(0.206 ns) = 13.009 ns; Loc. = LCCOMB_X24_Y15_N20; Fanout = 8; COMB Node = 'dis~2909'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.573 ns" { dis~2907 dis~2909 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.459 ns) + CELL(0.651 ns) 14.119 ns dis~2918 6 COMB LCCOMB_X24_Y15_N26 1 " "Info: 6: + IC(0.459 ns) + CELL(0.651 ns) = 14.119 ns; Loc. = LCCOMB_X24_Y15_N26; Fanout = 1; COMB Node = 'dis~2918'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.110 ns" { dis~2909 dis~2918 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.361 ns) + CELL(0.206 ns) 14.686 ns dis~2919 7 COMB LCCOMB_X24_Y15_N2 2 " "Info: 7: + IC(0.361 ns) + CELL(0.206 ns) = 14.686 ns; Loc. = LCCOMB_X24_Y15_N2; Fanout = 2; COMB Node = 'dis~2919'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.567 ns" { dis~2918 dis~2919 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.702 ns) + CELL(0.650 ns) 16.038 ns LessThan0~75 8 COMB LCCOMB_X23_Y15_N0 8 " "Info: 8: + IC(0.702 ns) + CELL(0.650 ns) = 16.038 ns; Loc. = LCCOMB_X23_Y15_N0; Fanout = 8; COMB Node = 'LessThan0~75'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.352 ns" { dis~2919 LessThan0~75 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 57 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.702 ns) + CELL(0.370 ns) 17.110 ns process0~217 9 COMB LCCOMB_X23_Y15_N26 7 " "Info: 9: + IC(0.702 ns) + CELL(0.370 ns) = 17.110 ns; Loc. = LCCOMB_X23_Y15_N26; Fanout = 7; COMB Node = 'process0~217'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.072 ns" { LessThan0~75 process0~217 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.701 ns) + CELL(0.621 ns) 18.432 ns Add7~254 10 COMB LCCOMB_X23_Y15_N4 2 " "Info: 10: + IC(0.701 ns) + CELL(0.621 ns) = 18.432 ns; Loc. = LCCOMB_X23_Y15_N4; Fanout = 2; COMB Node = 'Add7~254'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.322 ns" { process0~217 Add7~254 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 64 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 18.518 ns Add7~256 11 COMB LCCOMB_X23_Y15_N6 2 " "Info: 11: + IC(0.000 ns) + CELL(0.086 ns) = 18.518 ns; Loc. = LCCOMB_X23_Y15_N6; Fanout = 2; COMB Node = 'Add7~256'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add7~254 Add7~256 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 64 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 18.604 ns Add7~258 12 COMB LCCOMB_X23_Y15_N8 2 " "Info: 12: + IC(0.000 ns) + CELL(0.086 ns) = 18.604 ns; Loc. = LCCOMB_X23_Y15_N8; Fanout = 2; COMB Node = 'Add7~258'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add7~256 Add7~258 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 64 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 18.690 ns Add7~260 13 COMB LCCOMB_X23_Y15_N10 2 " "Info: 13: + IC(0.000 ns) + CELL(0.086 ns) = 18.690 ns; Loc. = LCCOMB_X23_Y15_N10; Fanout = 2; COMB Node = 'Add7~260'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { Add7~258 Add7~260 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 64 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 19.196 ns Add7~261 14 COMB LCCOMB_X23_Y15_N12 1 " "Info: 14: + IC(0.000 ns) + CELL(0.506 ns) = 19.196 ns; Loc. = LCCOMB_X23_Y15_N12; Fanout = 1; COMB Node = 'Add7~261'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { Add7~260 Add7~261 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 64 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.668 ns) + CELL(0.370 ns) 20.234 ns money_reg\[6\]~343 15 COMB LCCOMB_X22_Y15_N30 1 " "Info: 15: + IC(0.668 ns) + CELL(0.370 ns) = 20.234 ns; Loc. = LCCOMB_X22_Y15_N30; Fanout = 1; COMB Node = 'money_reg\[6\]~343'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.038 ns" { Add7~261 money_reg[6]~343 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 20.342 ns money_reg\[6\]~_emulated 16 REG LCFF_X22_Y15_N31 1 " "Info: 16: + IC(0.000 ns) + CELL(0.108 ns) = 20.342 ns; Loc. = LCFF_X22_Y15_N31; Fanout = 1; REG Node = 'money_reg\[6\]~_emulated'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { money_reg[6]~343 money_reg[6]~_emulated } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.535 ns ( 32.13 % ) " "Info: Total cell delay = 6.535 ns ( 32.13 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "13.807 ns ( 67.87 % ) " "Info: Total interconnect delay = 13.807 ns ( 67.87 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "20.342 ns" { speedup[0] process0~215 process0~2 dis~2907 dis~2909 dis~2918 dis~2919 LessThan0~75 process0~217 Add7~254 Add7~256 Add7~258 Add7~260 Add7~261 money_reg[6]~343 money_reg[6]~_emulated } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "20.342 ns" { speedup[0] speedup[0]~combout process0~215 process0~2 dis~2907 dis~2909 dis~2918 dis~2919 LessThan0~75 process0~217 Add7~254 Add7~256 Add7~258 Add7~260 Add7~261 money_reg[6]~343 money_reg[6]~_emulated } { 0.000ns 0.000ns 7.322ns 0.710ns 1.815ns 0.367ns 0.459ns 0.361ns 0.702ns 0.702ns 0.701ns 0.000ns 0.000ns 0.000ns 0.000ns 0.668ns 0.000ns } { 0.000ns 0.944ns 0.624ns 0.651ns 0.370ns 0.206ns 0.651ns 0.206ns 0.650ns 0.370ns 0.621ns 0.086ns 0.086ns 0.086ns 0.506ns 0.370ns 0.108ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.808 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 2.808 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk~clkctrl 2 COMB CLKCTRL_G2 35 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 35; COMB Node = 'clk~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.913 ns) + CELL(0.666 ns) 2.808 ns money_reg\[6\]~_emulated 3 REG LCFF_X22_Y15_N31 1 " "Info: 3: + IC(0.913 ns) + CELL(0.666 ns) = 2.808 ns; Loc. = LCFF_X22_Y15_N31; Fanout = 1; REG Node = 'money_reg\[6\]~_emulated'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.579 ns" { clk~clkctrl money_reg[6]~_emulated } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.756 ns ( 62.54 % ) " "Info: Total cell delay = 1.756 ns ( 62.54 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.052 ns ( 37.46 % ) " "Info: Total interconnect delay = 1.052 ns ( 37.46 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.808 ns" { clk clk~clkctrl money_reg[6]~_emulated } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.808 ns" { clk clk~combout clk~clkctrl money_reg[6]~_emulated } { 0.000ns 0.000ns 0.139ns 0.913ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "20.342 ns" { speedup[0] process0~215 process0~2 dis~2907 dis~2909 dis~2918 dis~2919 LessThan0~75 process0~217 Add7~254 Add7~256 Add7~258 Add7~260 Add7~261 money_reg[6]~343 money_reg[6]~_emulated } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "20.342 ns" { speedup[0] speedup[0]~combout process0~215 process0~2 dis~2907 dis~2909 dis~2918 dis~2919 LessThan0~75 process0~217 Add7~254 Add7~256 Add7~258 Add7~260 Add7~261 money_reg[6]~343 money_reg[6]~_emulated } { 0.000ns 0.000ns 7.322ns 0.710ns 1.815ns 0.367ns 0.459ns 0.361ns 0.702ns 0.702ns 0.701ns 0.000ns 0.000ns 0.000ns 0.000ns 0.668ns 0.000ns } { 0.000ns 0.944ns 0.624ns 0.651ns 0.370ns 0.206ns 0.651ns 0.206ns 0.650ns 0.370ns 0.621ns 0.086ns 0.086ns 0.086ns 0.506ns 0.370ns 0.108ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.808 ns" { clk clk~clkctrl money_reg[6]~_emulated } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.808 ns" { clk clk~combout clk~clkctrl money_reg[6]~_emulated } { 0.000ns 0.000ns 0.139ns 0.913ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk money\[6\] money_reg\[6\]~_emulated 9.991 ns register " "Info: tco from clock \"clk\" to destination pin \"money\[6\]\" through register \"money_reg\[6\]~_emulated\" is 9.991 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.808 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 2.808 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk~clkctrl 2 COMB CLKCTRL_G2 35 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 35; COMB Node = 'clk~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.913 ns) + CELL(0.666 ns) 2.808 ns money_reg\[6\]~_emulated 3 REG LCFF_X22_Y15_N31 1 " "Info: 3: + IC(0.913 ns) + CELL(0.666 ns) = 2.808 ns; Loc. = LCFF_X22_Y15_N31; Fanout = 1; REG Node = 'money_reg\[6\]~_emulated'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.579 ns" { clk~clkctrl money_reg[6]~_emulated } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.756 ns ( 62.54 % ) " "Info: Total cell delay = 1.756 ns ( 62.54 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.052 ns ( 37.46 % ) " "Info: Total interconnect delay = 1.052 ns ( 37.46 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.808 ns" { clk clk~clkctrl money_reg[6]~_emulated } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.808 ns" { clk clk~combout clk~clkctrl money_reg[6]~_emulated } { 0.000ns 0.000ns 0.139ns 0.913ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.879 ns + Longest register pin " "Info: + Longest register to pin delay is 6.879 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns money_reg\[6\]~_emulated 1 REG LCFF_X22_Y15_N31 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X22_Y15_N31; Fanout = 1; REG Node = 'money_reg\[6\]~_emulated'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { money_reg[6]~_emulated } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.436 ns) + CELL(0.624 ns) 1.060 ns money_reg\[6\]~337 2 COMB LCCOMB_X22_Y15_N22 4 " "Info: 2: + IC(0.436 ns) + CELL(0.624 ns) = 1.060 ns; Loc. = LCCOMB_X22_Y15_N22; Fanout = 4; COMB Node = 'money_reg\[6\]~337'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.060 ns" { money_reg[6]~_emulated money_reg[6]~337 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.583 ns) + CELL(3.236 ns) 6.879 ns money\[6\] 3 PIN PIN_60 0 " "Info: 3: + IC(2.583 ns) + CELL(3.236 ns) = 6.879 ns; Loc. = PIN_60; Fanout = 0; PIN Node = 'money\[6\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "5.819 ns" { money_reg[6]~337 money[6] } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.860 ns ( 56.11 % ) " "Info: Total cell delay = 3.860 ns ( 56.11 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.019 ns ( 43.89 % ) " "Info: Total interconnect delay = 3.019 ns ( 43.89 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "6.879 ns" { money_reg[6]~_emulated money_reg[6]~337 money[6] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "6.879 ns" { money_reg[6]~_emulated money_reg[6]~337 money[6] } { 0.000ns 0.436ns 2.583ns } { 0.000ns 0.624ns 3.236ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.808 ns" { clk clk~clkctrl money_reg[6]~_emulated } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.808 ns" { clk clk~combout clk~clkctrl money_reg[6]~_emulated } { 0.000ns 0.000ns 0.139ns 0.913ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "6.879 ns" { money_reg[6]~_emulated money_reg[6]~337 money[6] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "6.879 ns" { money_reg[6]~_emulated money_reg[6]~337 money[6] } { 0.000ns 0.436ns 2.583ns } { 0.000ns 0.624ns 3.236ns } "" } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "start money\[3\] 14.117 ns Longest " "Info: Longest tpd from source pin \"start\" to destination pin \"money\[3\]\" is 14.117 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.925 ns) 0.925 ns start 1 PIN PIN_97 13 " "Info: 1: + IC(0.000 ns) + CELL(0.925 ns) = 0.925 ns; Loc. = PIN_97; Fanout = 13; PIN Node = 'start'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { start } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(6.358 ns) + CELL(0.616 ns) 7.899 ns money_reg\[3\]~335 2 COMB LCCOMB_X22_Y15_N14 3 " "Info: 2: + IC(6.358 ns) + CELL(0.616 ns) = 7.899 ns; Loc. = LCCOMB_X22_Y15_N14; Fanout = 3; COMB Node = 'money_reg\[3\]~335'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "6.974 ns" { start money_reg[3]~335 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.982 ns) + CELL(3.236 ns) 14.117 ns money\[3\] 3 PIN PIN_64 0 " "Info: 3: + IC(2.982 ns) + CELL(3.236 ns) = 14.117 ns; Loc. = PIN_64; Fanout = 0; PIN Node = 'money\[3\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "6.218 ns" { money_reg[3]~335 money[3] } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.777 ns ( 33.84 % ) " "Info: Total cell delay = 4.777 ns ( 33.84 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "9.340 ns ( 66.16 % ) " "Info: Total interconnect delay = 9.340 ns ( 66.16 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "14.117 ns" { start money_reg[3]~335 money[3] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "14.117 ns" { start start~combout money_reg[3]~335 money[3] } { 0.000ns 0.000ns 6.358ns 2.982ns } { 0.000ns 0.925ns 0.616ns 3.236ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}