decoder.fit.qmsg

基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件）

{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "00:00:00 " "Info: Finished register packing: elapsed time is 00:00:00" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "Extra Info: No registers were packed into other blocks" {  } {  } 1 0 "No registers were packed into other blocks" 0 0}  } {  } 0 0 "Finished register packing: elapsed time is %1!s!" 0 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "42 unused 3.30 26 16 0 " "Info: Number of I/O pins in group: 42 (unused VREF, 3.30 VCCIO, 26 input, 16 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "3.3-V LVTTL. " "Info: I/O standards used: 3.3-V LVTTL." {  } {  } 0 0 "I/O standards used: %1!s!" 0 0}  } {  } 0 0 "Number of I/O pins in group: %1!d! (%2!s! VREF, %3!s! VCCIO, %4!d! input, %5!d! output, %6!d! bidirectional)" 0 0}  } {  } 0 0 "Statistics of %1!s!" 0 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use unused 3 14 " "Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 3 total pin(s) used --  14 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use unused 0 23 " "Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  23 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use unused 1 20 " "Info: I/O bank number 3 does not use VREF pins and has unused VCCIO pins. 1 total pin(s) used --  20 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use unused 0 24 " "Info: I/O bank number 4 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  24 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0}  } {  } 0 0 "Statistics of %1!s!" 0 0}  } {  } 0 0 "I/O bank details %1!s! I/O pin placement" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "6.480 ns register register " "Info: Estimated most critical path is register to register delay of 6.480 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns comb1\[0\] 1 REG LAB_X19_Y12 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X19_Y12; Fanout = 5; REG Node = 'comb1\[0\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { comb1[0] } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 33 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.329 ns) + CELL(0.621 ns) 1.950 ns LessThan0~192 2 COMB LAB_X21_Y12 1 " "Info: 2: + IC(1.329 ns) + CELL(0.621 ns) = 1.950 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~192'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.950 ns" { comb1[0] LessThan0~192 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.036 ns LessThan0~194 3 COMB LAB_X21_Y12 1 " "Info: 3: + IC(0.000 ns) + CELL(0.086 ns) = 2.036 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~194'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { LessThan0~192 LessThan0~194 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.122 ns LessThan0~196 4 COMB LAB_X21_Y12 1 " "Info: 4: + IC(0.000 ns) + CELL(0.086 ns) = 2.122 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~196'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { LessThan0~194 LessThan0~196 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.208 ns LessThan0~198 5 COMB LAB_X21_Y12 1 " "Info: 5: + IC(0.000 ns) + CELL(0.086 ns) = 2.208 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~198'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { LessThan0~196 LessThan0~198 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.294 ns LessThan0~200 6 COMB LAB_X21_Y12 1 " "Info: 6: + IC(0.000 ns) + CELL(0.086 ns) = 2.294 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~200'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { LessThan0~198 LessThan0~200 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.380 ns LessThan0~202 7 COMB LAB_X21_Y12 1 " "Info: 7: + IC(0.000 ns) + CELL(0.086 ns) = 2.380 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~202'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { LessThan0~200 LessThan0~202 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.466 ns LessThan0~204 8 COMB LAB_X21_Y12 1 " "Info: 8: + IC(0.000 ns) + CELL(0.086 ns) = 2.466 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~204'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { LessThan0~202 LessThan0~204 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.552 ns LessThan0~206 9 COMB LAB_X21_Y12 1 " "Info: 9: + IC(0.000 ns) + CELL(0.086 ns) = 2.552 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~206'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { LessThan0~204 LessThan0~206 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.638 ns LessThan0~208 10 COMB LAB_X21_Y12 1 " "Info: 10: + IC(0.000 ns) + CELL(0.086 ns) = 2.638 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~208'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { LessThan0~206 LessThan0~208 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.724 ns LessThan0~210 11 COMB LAB_X21_Y12 1 " "Info: 11: + IC(0.000 ns) + CELL(0.086 ns) = 2.724 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~210'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { LessThan0~208 LessThan0~210 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.810 ns LessThan0~212 12 COMB LAB_X21_Y12 1 " "Info: 12: + IC(0.000 ns) + CELL(0.086 ns) = 2.810 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~212'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { LessThan0~210 LessThan0~212 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.896 ns LessThan0~214 13 COMB LAB_X21_Y12 1 " "Info: 13: + IC(0.000 ns) + CELL(0.086 ns) = 2.896 ns; Loc. = LAB_X21_Y12; Fanout = 1; COMB Node = 'LessThan0~214'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { LessThan0~212 LessThan0~214 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 3.402 ns LessThan0~215 14 COMB LAB_X21_Y12 31 " "Info: 14: + IC(0.000 ns) + CELL(0.506 ns) = 3.402 ns; Loc. = LAB_X21_Y12; Fanout = 31; COMB Node = 'LessThan0~215'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { LessThan0~214 LessThan0~215 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.841 ns) + CELL(0.614 ns) 4.857 ns comb1_a~446 15 COMB LAB_X19_Y12 1 " "Info: 15: + IC(0.841 ns) + CELL(0.614 ns) = 4.857 ns; Loc. = LAB_X19_Y12; Fanout = 1; COMB Node = 'comb1_a~446'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.455 ns" { LessThan0~215 comb1_a~446 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.864 ns) + CELL(0.651 ns) 6.372 ns comb1_a~447 16 COMB LAB_X23_Y12 1 " "Info: 16: + IC(0.864 ns) + CELL(0.651 ns) = 6.372 ns; Loc. = LAB_X23_Y12; Fanout = 1; COMB Node = 'comb1_a~447'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.515 ns" { comb1_a~446 comb1_a~447 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 6.480 ns comb1_a\[3\] 17 REG LAB_X23_Y12 3 " "Info: 17: + IC(0.000 ns) + CELL(0.108 ns) = 6.480 ns; Loc. = LAB_X23_Y12; Fanout = 3; REG Node = 'comb1_a\[3\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { comb1_a~447 comb1_a[3] } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 33 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.446 ns ( 53.18 % ) " "Info: Total cell delay = 3.446 ns ( 53.18 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.034 ns ( 46.82 % ) " "Info: Total interconnect delay = 3.034 ns ( 46.82 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "6.480 ns" { comb1[0] LessThan0~192 LessThan0~194 LessThan0~196 LessThan0~198 LessThan0~200 LessThan0~202 LessThan0~204 LessThan0~206 LessThan0~208 LessThan0~210 LessThan0~212 LessThan0~214 LessThan0~215 comb1_a~446 comb1_a~447 comb1_a[3] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}