taxi_top.tan.qmsg

基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件）

{ "Info" "ITDB_FULL_TCO_RESULT" "clk20mhz seg7\[5\] decoder:inst1\|cnt\[1\] 19.557 ns register " "Info: tco from clock \"clk20mhz\" to destination pin \"seg7\[5\]\" through register \"decoder:inst1\|cnt\[1\]\" is 19.557 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk20mhz source 6.580 ns + Longest register " "Info: + Longest clock path from clock \"clk20mhz\" to source register is 6.580 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk20mhz 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk20mhz'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk20mhz } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 152 56 224 168 "clk20mhz" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk20mhz~clkctrl 2 COMB CLKCTRL_G2 105 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 105; COMB Node = 'clk20mhz~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk20mhz clk20mhz~clkctrl } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 152 56 224 168 "clk20mhz" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.912 ns) + CELL(0.970 ns) 3.111 ns decoder:inst1\|clk1khz 3 REG LCFF_X26_Y14_N25 2 " "Info: 3: + IC(0.912 ns) + CELL(0.970 ns) = 3.111 ns; Loc. = LCFF_X26_Y14_N25; Fanout = 2; REG Node = 'decoder:inst1\|clk1khz'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.882 ns" { clk20mhz~clkctrl decoder:inst1|clk1khz } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.905 ns) + CELL(0.000 ns) 5.016 ns decoder:inst1\|clk1khz~clkctrl 4 COMB CLKCTRL_G4 3 " "Info: 4: + IC(1.905 ns) + CELL(0.000 ns) = 5.016 ns; Loc. = CLKCTRL_G4; Fanout = 3; COMB Node = 'decoder:inst1\|clk1khz~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.905 ns" { decoder:inst1|clk1khz decoder:inst1|clk1khz~clkctrl } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.898 ns) + CELL(0.666 ns) 6.580 ns decoder:inst1\|cnt\[1\] 5 REG LCFF_X31_Y11_N1 22 " "Info: 5: + IC(0.898 ns) + CELL(0.666 ns) = 6.580 ns; Loc. = LCFF_X31_Y11_N1; Fanout = 22; REG Node = 'decoder:inst1\|cnt\[1\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.564 ns" { decoder:inst1|clk1khz~clkctrl decoder:inst1|cnt[1] } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 112 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.726 ns ( 41.43 % ) " "Info: Total cell delay = 2.726 ns ( 41.43 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.854 ns ( 58.57 % ) " "Info: Total interconnect delay = 3.854 ns ( 58.57 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "6.580 ns" { clk20mhz clk20mhz~clkctrl decoder:inst1|clk1khz decoder:inst1|clk1khz~clkctrl decoder:inst1|cnt[1] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "6.580 ns" { clk20mhz clk20mhz~combout clk20mhz~clkctrl decoder:inst1|clk1khz decoder:inst1|clk1khz~clkctrl decoder:inst1|cnt[1] } { 0.000ns 0.000ns 0.139ns 0.912ns 1.905ns 0.898ns } { 0.000ns 1.090ns 0.000ns 0.970ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 112 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "12.673 ns + Longest register pin " "Info: + Longest register to pin delay is 12.673 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns decoder:inst1\|cnt\[1\] 1 REG LCFF_X31_Y11_N1 22 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X31_Y11_N1; Fanout = 22; REG Node = 'decoder:inst1\|cnt\[1\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { decoder:inst1|cnt[1] } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 112 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.944 ns) + CELL(0.650 ns) 2.594 ns decoder:inst1\|Mux2~37 2 COMB LCCOMB_X33_Y17_N12 1 " "Info: 2: + IC(1.944 ns) + CELL(0.650 ns) = 2.594 ns; Loc. = LCCOMB_X33_Y17_N12; Fanout = 1; COMB Node = 'decoder:inst1\|Mux2~37'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.594 ns" { decoder:inst1|cnt[1] decoder:inst1|Mux2~37 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 115 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.886 ns) + CELL(0.651 ns) 5.131 ns decoder:inst1\|Mux2~38 3 COMB LCCOMB_X30_Y10_N30 1 " "Info: 3: + IC(1.886 ns) + CELL(0.651 ns) = 5.131 ns; Loc. = LCCOMB_X30_Y10_N30; Fanout = 1; COMB Node = 'decoder:inst1\|Mux2~38'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.537 ns" { decoder:inst1|Mux2~37 decoder:inst1|Mux2~38 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 115 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.599 ns) + CELL(0.206 ns) 5.936 ns decoder:inst1\|Mux2~41 4 COMB LCCOMB_X29_Y10_N6 7 " "Info: 4: + IC(0.599 ns) + CELL(0.206 ns) = 5.936 ns; Loc. = LCCOMB_X29_Y10_N6; Fanout = 7; COMB Node = 'decoder:inst1\|Mux2~41'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.805 ns" { decoder:inst1|Mux2~38 decoder:inst1|Mux2~41 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 115 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.502 ns) + CELL(0.651 ns) 8.089 ns decoder:inst1\|Mux14~21 5 COMB LCCOMB_X33_Y11_N4 1 " "Info: 5: + IC(1.502 ns) + CELL(0.651 ns) = 8.089 ns; Loc. = LCCOMB_X33_Y11_N4; Fanout = 1; COMB Node = 'decoder:inst1\|Mux14~21'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.153 ns" { decoder:inst1|Mux2~41 decoder:inst1|Mux14~21 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 129 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.358 ns) + CELL(3.226 ns) 12.673 ns seg7\[5\] 6 PIN PIN_112 0 " "Info: 6: + IC(1.358 ns) + CELL(3.226 ns) = 12.673 ns; Loc. = PIN_112; Fanout = 0; PIN Node = 'seg7\[5\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "4.584 ns" { decoder:inst1|Mux14~21 seg7[5] } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 240 720 896 256 "seg7\[6..0\]" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.384 ns ( 42.48 % ) " "Info: Total cell delay = 5.384 ns ( 42.48 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.289 ns ( 57.52 % ) " "Info: Total interconnect delay = 7.289 ns ( 57.52 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "12.673 ns" { decoder:inst1|cnt[1] decoder:inst1|Mux2~37 decoder:inst1|Mux2~38 decoder:inst1|Mux2~41 decoder:inst1|Mux14~21 seg7[5] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "12.673 ns" { decoder:inst1|cnt[1] decoder:inst1|Mux2~37 decoder:inst1|Mux2~38 decoder:inst1|Mux2~41 decoder:inst1|Mux14~21 seg7[5] } { 0.000ns 1.944ns 1.886ns 0.599ns 1.502ns 1.358ns } { 0.000ns 0.650ns 0.651ns 0.206ns 0.651ns 3.226ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "6.580 ns" { clk20mhz clk20mhz~clkctrl decoder:inst1|clk1khz decoder:inst1|clk1khz~clkctrl decoder:inst1|cnt[1] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "6.580 ns" { clk20mhz clk20mhz~combout clk20mhz~clkctrl decoder:inst1|clk1khz decoder:inst1|clk1khz~clkctrl decoder:inst1|cnt[1] } { 0.000ns 0.000ns 0.139ns 0.912ns 1.905ns 0.898ns } { 0.000ns 1.090ns 0.000ns 0.970ns 0.000ns 0.666ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "12.673 ns" { decoder:inst1|cnt[1] decoder:inst1|Mux2~37 decoder:inst1|Mux2~38 decoder:inst1|Mux2~41 decoder:inst1|Mux14~21 seg7[5] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "12.673 ns" { decoder:inst1|cnt[1] decoder:inst1|Mux2~37 decoder:inst1|Mux2~38 decoder:inst1|Mux2~41 decoder:inst1|Mux14~21 seg7[5] } { 0.000ns 1.944ns 1.886ns 0.599ns 1.502ns 1.358ns } { 0.000ns 0.650ns 0.651ns 0.206ns 0.651ns 3.226ns } "" } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "ITDB_TH_RESULT" "taxi:inst\|distance_reg\[1\] speedup\[0\] clk -5.998 ns register " "Info: th for register \"taxi:inst\|distance_reg\[1\]\" (data pin = \"speedup\[0\]\", clock pin = \"clk\") is -5.998 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.774 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to destination register is 2.774 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clk 1 CLK PIN_22 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_22; Fanout = 1; CLK Node = 'clk'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 192 56 224 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.136 ns) + CELL(0.000 ns) 1.236 ns clk~clkctrl 2 COMB CLKCTRL_G3 35 " "Info: 2: + IC(0.136 ns) + CELL(0.000 ns) = 1.236 ns; Loc. = CLKCTRL_G3; Fanout = 35; COMB Node = 'clk~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.136 ns" { clk clk~clkctrl } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 192 56 224 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.872 ns) + CELL(0.666 ns) 2.774 ns taxi:inst\|distance_reg\[1\] 3 REG LCFF_X24_Y9_N25 7 " "Info: 3: + IC(0.872 ns) + CELL(0.666 ns) = 2.774 ns; Loc. = LCFF_X24_Y9_N25; Fanout = 7; REG Node = 'taxi:inst\|distance_reg\[1\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.538 ns" { clk~clkctrl taxi:inst|distance_reg[1] } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.766 ns ( 63.66 % ) " "Info: Total cell delay = 1.766 ns ( 63.66 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.008 ns ( 36.34 % ) " "Info: Total interconnect delay = 1.008 ns ( 36.34 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.774 ns" { clk clk~clkctrl taxi:inst|distance_reg[1] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.774 ns" { clk clk~combout clk~clkctrl taxi:inst|distance_re