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📄 taxi_top.tan.qmsg

📁 基于Quartus II FPGA/CPLD数字系统设计实例(VHDL源代码文件)
💻 QMSG
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{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk20mhz register decoder:inst1\|comb2\[4\] register decoder:inst1\|comb2_d\[0\] 145.03 MHz 6.895 ns Internal " "Info: Clock \"clk20mhz\" has Internal fmax of 145.03 MHz between source register \"decoder:inst1\|comb2\[4\]\" and destination register \"decoder:inst1\|comb2_d\[0\]\" (period= 6.895 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.637 ns + Longest register register " "Info: + Longest register to register delay is 6.637 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns decoder:inst1\|comb2\[4\] 1 REG LCFF_X24_Y10_N15 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X24_Y10_N15; Fanout = 5; REG Node = 'decoder:inst1\|comb2\[4\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { decoder:inst1|comb2[4] } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 73 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.694 ns) + CELL(0.623 ns) 1.317 ns decoder:inst1\|Equal8~139 2 COMB LCCOMB_X23_Y10_N0 1 " "Info: 2: + IC(0.694 ns) + CELL(0.623 ns) = 1.317 ns; Loc. = LCCOMB_X23_Y10_N0; Fanout = 1; COMB Node = 'decoder:inst1\|Equal8~139'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.317 ns" { decoder:inst1|comb2[4] decoder:inst1|Equal8~139 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 94 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.021 ns) + CELL(0.370 ns) 2.708 ns decoder:inst1\|Equal8~143 3 COMB LCCOMB_X26_Y10_N6 4 " "Info: 3: + IC(1.021 ns) + CELL(0.370 ns) = 2.708 ns; Loc. = LCCOMB_X26_Y10_N6; Fanout = 4; COMB Node = 'decoder:inst1\|Equal8~143'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.391 ns" { decoder:inst1|Equal8~139 decoder:inst1|Equal8~143 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 94 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.063 ns) + CELL(0.646 ns) 4.417 ns decoder:inst1\|comb2\[6\]~689 4 COMB LCCOMB_X23_Y10_N30 17 " "Info: 4: + IC(1.063 ns) + CELL(0.646 ns) = 4.417 ns; Loc. = LCCOMB_X23_Y10_N30; Fanout = 17; COMB Node = 'decoder:inst1\|comb2\[6\]~689'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.709 ns" { decoder:inst1|Equal8~143 decoder:inst1|comb2[6]~689 } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 73 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.365 ns) + CELL(0.855 ns) 6.637 ns decoder:inst1\|comb2_d\[0\] 5 REG LCFF_X29_Y10_N15 3 " "Info: 5: + IC(1.365 ns) + CELL(0.855 ns) = 6.637 ns; Loc. = LCFF_X29_Y10_N15; Fanout = 3; REG Node = 'decoder:inst1\|comb2_d\[0\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.220 ns" { decoder:inst1|comb2[6]~689 decoder:inst1|comb2_d[0] } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 73 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.494 ns ( 37.58 % ) " "Info: Total cell delay = 2.494 ns ( 37.58 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.143 ns ( 62.42 % ) " "Info: Total interconnect delay = 4.143 ns ( 62.42 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "6.637 ns" { decoder:inst1|comb2[4] decoder:inst1|Equal8~139 decoder:inst1|Equal8~143 decoder:inst1|comb2[6]~689 decoder:inst1|comb2_d[0] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "6.637 ns" { decoder:inst1|comb2[4] decoder:inst1|Equal8~139 decoder:inst1|Equal8~143 decoder:inst1|comb2[6]~689 decoder:inst1|comb2_d[0] } { 0.000ns 0.694ns 1.021ns 1.063ns 1.365ns } { 0.000ns 0.623ns 0.370ns 0.646ns 0.855ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.006 ns - Smallest " "Info: - Smallest clock skew is 0.006 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk20mhz destination 2.771 ns + Shortest register " "Info: + Shortest clock path from clock \"clk20mhz\" to destination register is 2.771 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk20mhz 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk20mhz'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk20mhz } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 152 56 224 168 "clk20mhz" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk20mhz~clkctrl 2 COMB CLKCTRL_G2 105 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 105; COMB Node = 'clk20mhz~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk20mhz clk20mhz~clkctrl } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 152 56 224 168 "clk20mhz" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.876 ns) + CELL(0.666 ns) 2.771 ns decoder:inst1\|comb2_d\[0\] 3 REG LCFF_X29_Y10_N15 3 " "Info: 3: + IC(0.876 ns) + CELL(0.666 ns) = 2.771 ns; Loc. = LCFF_X29_Y10_N15; Fanout = 3; REG Node = 'decoder:inst1\|comb2_d\[0\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.542 ns" { clk20mhz~clkctrl decoder:inst1|comb2_d[0] } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 73 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.756 ns ( 63.37 % ) " "Info: Total cell delay = 1.756 ns ( 63.37 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.015 ns ( 36.63 % ) " "Info: Total interconnect delay = 1.015 ns ( 36.63 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.771 ns" { clk20mhz clk20mhz~clkctrl decoder:inst1|comb2_d[0] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.771 ns" { clk20mhz clk20mhz~combout clk20mhz~clkctrl decoder:inst1|comb2_d[0] } { 0.000ns 0.000ns 0.139ns 0.876ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk20mhz source 2.765 ns - Longest register " "Info: - Longest clock path from clock \"clk20mhz\" to source register is 2.765 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk20mhz 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk20mhz'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk20mhz } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 152 56 224 168 "clk20mhz" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk20mhz~clkctrl 2 COMB CLKCTRL_G2 105 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 105; COMB Node = 'clk20mhz~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk20mhz clk20mhz~clkctrl } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 152 56 224 168 "clk20mhz" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.870 ns) + CELL(0.666 ns) 2.765 ns decoder:inst1\|comb2\[4\] 3 REG LCFF_X24_Y10_N15 5 " "Info: 3: + IC(0.870 ns) + CELL(0.666 ns) = 2.765 ns; Loc. = LCFF_X24_Y10_N15; Fanout = 5; REG Node = 'decoder:inst1\|comb2\[4\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.536 ns" { clk20mhz~clkctrl decoder:inst1|comb2[4] } "NODE_NAME" } } { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 73 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.756 ns ( 63.51 % ) " "Info: Total cell delay = 1.756 ns ( 63.51 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.009 ns ( 36.49 % ) " "Info: Total interconnect delay = 1.009 ns ( 36.49 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.765 ns" { clk20mhz clk20mhz~clkctrl decoder:inst1|comb2[4] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.765 ns" { clk20mhz clk20mhz~combout clk20mhz~clkctrl decoder:inst1|comb2[4] } { 0.000ns 0.000ns 0.139ns 0.870ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.771 ns" { clk20mhz clk20mhz~clkctrl decoder:inst1|comb2_d[0] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.771 ns" { clk20mhz clk20mhz~combout clk20mhz~clkctrl decoder:inst1|comb2_d[0] } { 0.000ns 0.000ns 0.139ns 0.876ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.765 ns" { clk20mhz clk20mhz~clkctrl decoder:inst1|comb2[4] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.765 ns" { clk20mhz clk20mhz~combout clk20mhz~clkctrl decoder:inst1|comb2[4] } { 0.000ns 0.000ns 0.139ns 0.870ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 73 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "decoder.vhd" "" { Text "D:/my_eda2/taxi/decoder.vhd" 73 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "6.637 ns" { decoder:inst1|comb2[4] decoder:inst1|Equal8~139 decoder:inst1|Equal8~143 decoder:inst1|comb2[6]~689 decoder:inst1|comb2_d[0] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "6.637 ns" { decoder:inst1|comb2[4] decoder:inst1|Equal8~139 decoder:inst1|Equal8~143 decoder:inst1|comb2[6]~689 decoder:inst1|comb2_d[0] } { 0.000ns 0.694ns 1.021ns 1.063ns 1.365ns } { 0.000ns 0.623ns 0.370ns 0.646ns 0.855ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.771 ns" { clk20mhz clk20mhz~clkctrl decoder:inst1|comb2_d[0] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.771 ns" { clk20mhz clk20mhz~combout clk20mhz~clkctrl decoder:inst1|comb2_d[0] } { 0.000ns 0.000ns 0.139ns 0.876ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.765 ns" { clk20mhz clk20mhz~clkctrl decoder:inst1|comb2[4] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.765 ns" { clk20mhz clk20mhz~combout clk20mhz~clkctrl decoder:inst1|comb2[4] } { 0.000ns 0.000ns 0.139ns 0.870ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register taxi:inst\|num\[3\] register taxi:inst\|money_reg\[12\] 93.79 MHz 10.662 ns Internal " "Info: Clock \"clk\" has Internal fmax of 93.79 MHz between source register \"taxi:inst\|num\[3\]\" and destination register \"taxi:inst\|money_reg\[12\]\" (period= 10.662 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "10.398 ns + Longest register register " "Info: + Longest register to register delay is 10.398 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns taxi:inst\|num\[3\] 1 REG LCFF_X30_Y16_N21 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X30_Y16_N21; Fanout = 3; REG Node = 'taxi:inst\|num\[3\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { taxi:inst|num[3] } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.474 ns) + CELL(0.606 ns) 1.080 ns taxi:inst\|Equal3~41 2 COMB LCCOMB_X30_Y16_N28 12 " "Info: 2: + IC(0.474 ns) + CELL(0.606 ns) = 1.080 ns; Loc. = LCCOMB_X30_Y16_N28; Fanout = 12; COMB Node = 'taxi:inst\|Equal3~41'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.080 ns" { taxi:inst|num[3] taxi:inst|Equal3~41 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 47 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.327 ns) + CELL(0.206 ns) 3.613 ns taxi:inst\|distance_reg~3450 3 COMB LCCOMB_X24_Y9_N10 10 " "Info: 3: + IC(2.327 ns) + CELL(0.206 ns) = 3.613 ns; Loc. = LCCOMB_X24_Y9_N10; Fanout = 10; COMB Node = 'taxi:inst\|distance_reg~3450'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.533 ns" { taxi:inst|Equal3~41 taxi:inst|distance_reg~3450 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.048 ns) + CELL(0.615 ns) 5.276 ns taxi:inst\|Add0~1623 4 COMB LCCOMB_X25_Y10_N0 2 " "Info: 4: + IC(1.048 ns) + CELL(0.615 ns) = 5.276 ns; Loc. = LCCOMB_X25_Y10_N0; Fanout = 2; COMB Node = 'taxi:inst\|Add0~1623'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.663 ns" { taxi:inst|distance_reg~3450 taxi:inst|Add0~1623 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 42 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.189 ns) + CELL(0.206 ns) 7.671 ns taxi:inst\|LessThan1~168 5 COMB LCCOMB_X28_Y16_N4 1 " "Info: 5: + IC(2.189 ns) + CELL(0.206 ns) = 7.671 ns; Loc. = LCCOMB_X28_Y16_N4; Fanout = 1; COMB Node = 'taxi:inst\|LessThan1~168'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.395 ns" { taxi:inst|Add0~1623 taxi:inst|LessThan1~168 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 62 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.378 ns) + CELL(0.370 ns) 8.419 ns taxi:inst\|LessThan1~169 6 COMB LCCOMB_X28_Y16_N6 1 " "Info: 6: + IC(0.378 ns) + CELL(0.370 ns) = 8.419 ns; Loc. = LCCOMB_X28_Y16_N6; Fanout = 1; COMB Node = 'taxi:inst\|LessThan1~169'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.748 ns" { taxi:inst|LessThan1~168 taxi:inst|LessThan1~169 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 62 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.374 ns) + CELL(0.206 ns) 8.999 ns taxi:inst\|money_reg\[4\]~335 7 COMB LCCOMB_X28_Y16_N14 11 " "Info: 7: + IC(0.374 ns) + CELL(0.206 ns) = 8.999 ns; Loc. = LCCOMB_X28_Y16_N14; Fanout = 11; COMB Node = 'taxi:inst\|money_reg\[4\]~335'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.580 ns" { taxi:inst|LessThan1~169 taxi:inst|money_reg[4]~335 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.544 ns) + CELL(0.855 ns) 10.398 ns taxi:inst\|money_reg\[12\] 8 REG LCFF_X29_Y16_N25 5 " "Info: 8: + IC(0.544 ns) + CELL(0.855 ns) = 10.398 ns; Loc. = LCFF_X29_Y16_N25; Fanout = 5; REG Node = 'taxi:inst\|money_reg\[12\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.399 ns" { taxi:inst|money_reg[4]~335 taxi:inst|money_reg[12] } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.064 ns ( 29.47 % ) " "Info: Total cell delay = 3.064 ns ( 29.47 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.334 ns ( 70.53 % ) " "Info: Total interconnect delay = 7.334 ns ( 70.53 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "10.398 ns" { taxi:inst|num[3] taxi:inst|Equal3~41 taxi:inst|distance_reg~3450 taxi:inst|Add0~1623 taxi:inst|LessThan1~168 taxi:inst|LessThan1~169 taxi:inst|money_reg[4]~335 taxi:inst|money_reg[12] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "10.398 ns" { taxi:inst|num[3] taxi:inst|Equal3~41 taxi:inst|distance_reg~3450 taxi:inst|Add0~1623 taxi:inst|LessThan1~168 taxi:inst|LessThan1~169 taxi:inst|money_reg[4]~335 taxi:inst|money_reg[12] } { 0.000ns 0.474ns 2.327ns 1.048ns 2.189ns 0.378ns 0.374ns 0.544ns } { 0.000ns 0.606ns 0.206ns 0.615ns 0.206ns 0.370ns 0.206ns 0.855ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.829 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 2.829 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clk 1 CLK PIN_22 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_22; Fanout = 1; CLK Node = 'clk'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 192 56 224 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.136 ns) + CELL(0.000 ns) 1.236 ns clk~clkctrl 2 COMB CLKCTRL_G3 35 " "Info: 2: + IC(0.136 ns) + CELL(0.000 ns) = 1.236 ns; Loc. = CLKCTRL_G3; Fanout = 35; COMB Node = 'clk~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.136 ns" { clk clk~clkctrl } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 192 56 224 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.927 ns) + CELL(0.666 ns) 2.829 ns taxi:inst\|money_reg\[12\] 3 REG LCFF_X29_Y16_N25 5 " "Info: 3: + IC(0.927 ns) + CELL(0.666 ns) = 2.829 ns; Loc. = LCFF_X29_Y16_N25; Fanout = 5; REG Node = 'taxi:inst\|money_reg\[12\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.593 ns" { clk~clkctrl taxi:inst|money_reg[12] } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.766 ns ( 62.42 % ) " "Info: Total cell delay = 1.766 ns ( 62.42 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.063 ns ( 37.58 % ) " "Info: Total interconnect delay = 1.063 ns ( 37.58 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.829 ns" { clk clk~clkctrl taxi:inst|money_reg[12] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.829 ns" { clk clk~combout clk~clkctrl taxi:inst|money_reg[12] } { 0.000ns 0.000ns 0.136ns 0.927ns } { 0.000ns 1.100ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.829 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.829 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clk 1 CLK PIN_22 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_22; Fanout = 1; CLK Node = 'clk'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 192 56 224 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.136 ns) + CELL(0.000 ns) 1.236 ns clk~clkctrl 2 COMB CLKCTRL_G3 35 " "Info: 2: + IC(0.136 ns) + CELL(0.000 ns) = 1.236 ns; Loc. = CLKCTRL_G3; Fanout = 35; COMB Node = 'clk~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.136 ns" { clk clk~clkctrl } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 192 56 224 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.927 ns) + CELL(0.666 ns) 2.829 ns taxi:inst\|num\[3\] 3 REG LCFF_X30_Y16_N21 3 " "Info: 3: + IC(0.927 ns) + CELL(0.666 ns) = 2.829 ns; Loc. = LCFF_X30_Y16_N21; Fanout = 3; REG Node = 'taxi:inst\|num\[3\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.593 ns" { clk~clkctrl taxi:inst|num[3] } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.766 ns ( 62.42 % ) " "Info: Total cell delay = 1.766 ns ( 62.42 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.063 ns ( 37.58 % ) " "Info: Total interconnect delay = 1.063 ns ( 37.58 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.829 ns" { clk clk~clkctrl taxi:inst|num[3] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.829 ns" { clk clk~combout clk~clkctrl taxi:inst|num[3] } { 0.000ns 0.000ns 0.136ns 0.927ns } { 0.000ns 1.100ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.829 ns" { clk clk~clkctrl taxi:inst|money_reg[12] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.829 ns" { clk clk~combout clk~clkctrl taxi:inst|money_reg[12] } { 0.000ns 0.000ns 0.136ns 0.927ns } { 0.000ns 1.100ns 0.000ns 0.666ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.829 ns" { clk clk~clkctrl taxi:inst|num[3] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.829 ns" { clk clk~combout clk~clkctrl taxi:inst|num[3] } { 0.000ns 0.000ns 0.136ns 0.927ns } { 0.000ns 1.100ns 0.000ns 0.666ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "10.398 ns" { taxi:inst|num[3] taxi:inst|Equal3~41 taxi:inst|distance_reg~3450 taxi:inst|Add0~1623 taxi:inst|LessThan1~168 taxi:inst|LessThan1~169 taxi:inst|money_reg[4]~335 taxi:inst|money_reg[12] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "10.398 ns" { taxi:inst|num[3] taxi:inst|Equal3~41 taxi:inst|distance_reg~3450 taxi:inst|Add0~1623 taxi:inst|LessThan1~168 taxi:inst|LessThan1~169 taxi:inst|money_reg[4]~335 taxi:inst|money_reg[12] } { 0.000ns 0.474ns 2.327ns 1.048ns 2.189ns 0.378ns 0.374ns 0.544ns } { 0.000ns 0.606ns 0.206ns 0.615ns 0.206ns 0.370ns 0.206ns 0.855ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.829 ns" { clk clk~clkctrl taxi:inst|money_reg[12] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.829 ns" { clk clk~combout clk~clkctrl taxi:inst|money_reg[12] } { 0.000ns 0.000ns 0.136ns 0.927ns } { 0.000ns 1.100ns 0.000ns 0.666ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.829 ns" { clk clk~clkctrl taxi:inst|num[3] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.829 ns" { clk clk~combout clk~clkctrl taxi:inst|num[3] } { 0.000ns 0.000ns 0.136ns 0.927ns } { 0.000ns 1.100ns 0.000ns 0.666ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_TSU_RESULT" "taxi:inst\|money_reg\[6\]~_emulated pause clk 18.004 ns register " "Info: tsu for register \"taxi:inst\|money_reg\[6\]~_emulated\" (data pin = \"pause\", clock pin = \"clk\") is 18.004 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "20.872 ns + Longest pin register " "Info: + Longest pin to register delay is 20.872 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.944 ns) 0.944 ns pause 1 PIN PIN_65 7 " "Info: 1: + IC(0.000 ns) + CELL(0.944 ns) = 0.944 ns; Loc. = PIN_65; Fanout = 7; PIN Node = 'pause'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { pause } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 312 56 224 328 "pause" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(8.108 ns) + CELL(0.539 ns) 9.591 ns taxi:inst\|Equal2~89 2 COMB LCCOMB_X25_Y12_N12 4 " "Info: 2: + IC(8.108 ns) + CELL(0.539 ns) = 9.591 ns; Loc. = LCCOMB_X25_Y12_N12; Fanout = 4; COMB Node = 'taxi:inst\|Equal2~89'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "8.647 ns" { pause taxi:inst|Equal2~89 } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "e:/altera/quartus ii7.0/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1805 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.419 ns) + CELL(0.615 ns) 10.625 ns taxi:inst\|dis~2899 3 COMB LCCOMB_X25_Y12_N20 3 " "Info: 3: + IC(0.419 ns) + CELL(0.615 ns) = 10.625 ns; Loc. = LCCOMB_X25_Y12_N20; Fanout = 3; COMB Node = 'taxi:inst\|dis~2899'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.034 ns" { taxi:inst|Equal2~89 taxi:inst|dis~2899 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.866 ns) + CELL(0.651 ns) 13.142 ns taxi:inst\|dis~2900 4 COMB LCCOMB_X30_Y16_N18 8 " "Info: 4: + IC(1.866 ns) + CELL(0.651 ns) = 13.142 ns; Loc. = LCCOMB_X30_Y16_N18; Fanout = 8; COMB Node = 'taxi:inst\|dis~2900'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.517 ns" { taxi:inst|dis~2899 taxi:inst|dis~2900 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.396 ns) + CELL(0.624 ns) 14.162 ns taxi:inst\|dis~2903 5 COMB LCCOMB_X30_Y16_N0 8 " "Info: 5: + IC(0.396 ns) + CELL(0.624 ns) = 14.162 ns; Loc. = LCCOMB_X30_Y16_N0; Fanout = 8; COMB Node = 'taxi:inst\|dis~2903'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.020 ns" { taxi:inst|dis~2900 taxi:inst|dis~2903 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.433 ns) + CELL(0.589 ns) 15.184 ns taxi:inst\|dis~2908 6 COMB LCCOMB_X30_Y16_N24 1 " "Info: 6: + IC(0.433 ns) + CELL(0.589 ns) = 15.184 ns; Loc. = LCCOMB_X30_Y16_N24; Fanout = 1; COMB Node = 'taxi:inst\|dis~2908'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.022 ns" { taxi:inst|dis~2903 taxi:inst|dis~2908 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.375 ns) + CELL(0.370 ns) 15.929 ns taxi:inst\|dis~2909 7 COMB LCCOMB_X30_Y16_N30 2 " "Info: 7: + IC(0.375 ns) + CELL(0.370 ns) = 15.929 ns; Loc. = LCCOMB_X30_Y16_N30; Fanout = 2; COMB Node = 'taxi:inst\|dis~2909'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.745 ns" { taxi:inst|dis~2908 taxi:inst|dis~2909 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.607 ns) + CELL(0.589 ns) 17.125 ns taxi:inst\|LessThan0~82 8 COMB LCCOMB_X29_Y16_N2 8 " "Info: 8: + IC(0.607 ns) + CELL(0.589 ns) = 17.125 ns; Loc. = LCCOMB_X29_Y16_N2; Fanout = 8; COMB Node = 'taxi:inst\|LessThan0~82'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.196 ns" { taxi:inst|dis~2909 taxi:inst|LessThan0~82 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 57 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.393 ns) + CELL(0.206 ns) 17.724 ns taxi:inst\|Add7~252 9 COMB LCCOMB_X29_Y16_N30 1 " "Info: 9: + IC(0.393 ns) + CELL(0.206 ns) = 17.724 ns; Loc. = LCCOMB_X29_Y16_N30; Fanout = 1; COMB Node = 'taxi:inst\|Add7~252'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.599 ns" { taxi:inst|LessThan0~82 taxi:inst|Add7~252 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 64 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.621 ns) + CELL(0.621 ns) 18.966 ns taxi:inst\|Add7~254 10 COMB LCCOMB_X29_Y16_N4 2 " "Info: 10: + IC(0.621 ns) + CELL(0.621 ns) = 18.966 ns; Loc. = LCCOMB_X29_Y16_N4; Fanout = 2; COMB Node = 'taxi:inst\|Add7~254'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.242 ns" { taxi:inst|Add7~252 taxi:inst|Add7~254 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 64 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 19.052 ns taxi:inst\|Add7~256 11 COMB LCCOMB_X29_Y16_N6 2 " "Info: 11: + IC(0.000 ns) + CELL(0.086 ns) = 19.052 ns; Loc. = LCCOMB_X29_Y16_N6; Fanout = 2; COMB Node = 'taxi:inst\|Add7~256'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { taxi:inst|Add7~254 taxi:inst|Add7~256 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 64 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 19.138 ns taxi:inst\|Add7~258 12 COMB LCCOMB_X29_Y16_N8 2 " "Info: 12: + IC(0.000 ns) + CELL(0.086 ns) = 19.138 ns; Loc. = LCCOMB_X29_Y16_N8; Fanout = 2; COMB Node = 'taxi:inst\|Add7~258'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { taxi:inst|Add7~256 taxi:inst|Add7~258 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 64 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 19.224 ns taxi:inst\|Add7~260 13 COMB LCCOMB_X29_Y16_N10 2 " "Info: 13: + IC(0.000 ns) + CELL(0.086 ns) = 19.224 ns; Loc. = LCCOMB_X29_Y16_N10; Fanout = 2; COMB Node = 'taxi:inst\|Add7~260'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { taxi:inst|Add7~258 taxi:inst|Add7~260 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 64 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 19.730 ns taxi:inst\|Add7~261 14 COMB LCCOMB_X29_Y16_N12 1 " "Info: 14: + IC(0.000 ns) + CELL(0.506 ns) = 19.730 ns; Loc. = LCCOMB_X29_Y16_N12; Fanout = 1; COMB Node = 'taxi:inst\|Add7~261'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { taxi:inst|Add7~260 taxi:inst|Add7~261 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 64 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.664 ns) + CELL(0.370 ns) 20.764 ns taxi:inst\|money_reg\[6\]~334 15 COMB LCCOMB_X28_Y16_N12 1 " "Info: 15: + IC(0.664 ns) + CELL(0.370 ns) = 20.764 ns; Loc. = LCCOMB_X28_Y16_N12; Fanout = 1; COMB Node = 'taxi:inst\|money_reg\[6\]~334'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.034 ns" { taxi:inst|Add7~261 taxi:inst|money_reg[6]~334 } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 20.872 ns taxi:inst\|money_reg\[6\]~_emulated 16 REG LCFF_X28_Y16_N13 1 " "Info: 16: + IC(0.000 ns) + CELL(0.108 ns) = 20.872 ns; Loc. = LCFF_X28_Y16_N13; Fanout = 1; REG Node = 'taxi:inst\|money_reg\[6\]~_emulated'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { taxi:inst|money_reg[6]~334 taxi:inst|money_reg[6]~_emulated } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.990 ns ( 33.49 % ) " "Info: Total cell delay = 6.990 ns ( 33.49 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "13.882 ns ( 66.51 % ) " "Info: Total interconnect delay = 13.882 ns ( 66.51 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "20.872 ns" { pause taxi:inst|Equal2~89 taxi:inst|dis~2899 taxi:inst|dis~2900 taxi:inst|dis~2903 taxi:inst|dis~2908 taxi:inst|dis~2909 taxi:inst|LessThan0~82 taxi:inst|Add7~252 taxi:inst|Add7~254 taxi:inst|Add7~256 taxi:inst|Add7~258 taxi:inst|Add7~260 taxi:inst|Add7~261 taxi:inst|money_reg[6]~334 taxi:inst|money_reg[6]~_emulated } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "20.872 ns" { pause pause~combout taxi:inst|Equal2~89 taxi:inst|dis~2899 taxi:inst|dis~2900 taxi:inst|dis~2903 taxi:inst|dis~2908 taxi:inst|dis~2909 taxi:inst|LessThan0~82 taxi:inst|Add7~252 taxi:inst|Add7~254 taxi:inst|Add7~256 taxi:inst|Add7~258 taxi:inst|Add7~260 taxi:inst|Add7~261 taxi:inst|money_reg[6]~334 taxi:inst|money_reg[6]~_emulated } { 0.000ns 0.000ns 8.108ns 0.419ns 1.866ns 0.396ns 0.433ns 0.375ns 0.607ns 0.393ns 0.621ns 0.000ns 0.000ns 0.000ns 0.000ns 0.664ns 0.000ns } { 0.000ns 0.944ns 0.539ns 0.615ns 0.651ns 0.624ns 0.589ns 0.370ns 0.589ns 0.206ns 0.621ns 0.086ns 0.086ns 0.086ns 0.506ns 0.370ns 0.108ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.828 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 2.828 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clk 1 CLK PIN_22 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_22; Fanout = 1; CLK Node = 'clk'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 192 56 224 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.136 ns) + CELL(0.000 ns) 1.236 ns clk~clkctrl 2 COMB CLKCTRL_G3 35 " "Info: 2: + IC(0.136 ns) + CELL(0.000 ns) = 1.236 ns; Loc. = CLKCTRL_G3; Fanout = 35; COMB Node = 'clk~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.136 ns" { clk clk~clkctrl } "NODE_NAME" } } { "taxi_top.bdf" "" { Schematic "D:/my_eda2/taxi/taxi_top.bdf" { { 192 56 224 208 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.926 ns) + CELL(0.666 ns) 2.828 ns taxi:inst\|money_reg\[6\]~_emulated 3 REG LCFF_X28_Y16_N13 1 " "Info: 3: + IC(0.926 ns) + CELL(0.666 ns) = 2.828 ns; Loc. = LCFF_X28_Y16_N13; Fanout = 1; REG Node = 'taxi:inst\|money_reg\[6\]~_emulated'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.592 ns" { clk~clkctrl taxi:inst|money_reg[6]~_emulated } "NODE_NAME" } } { "taxi.vhd" "" { Text "D:/my_eda2/taxi/taxi.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.766 ns ( 62.45 % ) " "Info: Total cell delay = 1.766 ns ( 62.45 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.062 ns ( 37.55 % ) " "Info: Total interconnect delay = 1.062 ns ( 37.55 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.828 ns" { clk clk~clkctrl taxi:inst|money_reg[6]~_emulated } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.828 ns" { clk clk~combout clk~clkctrl taxi:inst|money_reg[6]~_emulated } { 0.000ns 0.000ns 0.136ns 0.926ns } { 0.000ns 1.100ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "20.872 ns" { pause taxi:inst|Equal2~89 taxi:inst|dis~2899 taxi:inst|dis~2900 taxi:inst|dis~2903 taxi:inst|dis~2908 taxi:inst|dis~2909 taxi:inst|LessThan0~82 taxi:inst|Add7~252 taxi:inst|Add7~254 taxi:inst|Add7~256 taxi:inst|Add7~258 taxi:inst|Add7~260 taxi:inst|Add7~261 taxi:inst|money_reg[6]~334 taxi:inst|money_reg[6]~_emulated } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "20.872 ns" { pause pause~combout taxi:inst|Equal2~89 taxi:inst|dis~2899 taxi:inst|dis~2900 taxi:inst|dis~2903 taxi:inst|dis~2908 taxi:inst|dis~2909 taxi:inst|LessThan0~82 taxi:inst|Add7~252 taxi:inst|Add7~254 taxi:inst|Add7~256 taxi:inst|Add7~258 taxi:inst|Add7~260 taxi:inst|Add7~261 taxi:inst|money_reg[6]~334 taxi:inst|money_reg[6]~_emulated } { 0.000ns 0.000ns 8.108ns 0.419ns 1.866ns 0.396ns 0.433ns 0.375ns 0.607ns 0.393ns 0.621ns 0.000ns 0.000ns 0.000ns 0.000ns 0.664ns 0.000ns } { 0.000ns 0.944ns 0.539ns 0.615ns 0.651ns 0.624ns 0.589ns 0.370ns 0.589ns 0.206ns 0.621ns 0.086ns 0.086ns 0.086ns 0.506ns 0.370ns 0.108ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.828 ns" { clk clk~clkctrl taxi:inst|money_reg[6]~_emulated } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.828 ns" { clk clk~combout clk~clkctrl taxi:inst|money_reg[6]~_emulated } { 0.000ns 0.000ns 0.136ns 0.926ns } { 0.000ns 1.100ns 0.000ns 0.666ns } "" } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}

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