ping_pang.tan.qmsg

基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件）

{ "Info" "ITDB_TSU_RESULT" "shift_1\[11\] af clk1khz 6.558 ns register " "Info: tsu for register \"shift_1\[11\]\" (data pin = \"af\", clock pin = \"clk1khz\") is 6.558 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "12.030 ns + Longest pin register " "Info: + Longest pin to register delay is 12.030 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.934 ns) 0.934 ns af 1 PIN PIN_67 6 " "Info: 1: + IC(0.000 ns) + CELL(0.934 ns) = 0.934 ns; Loc. = PIN_67; Fanout = 6; PIN Node = 'af'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { af } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(7.084 ns) + CELL(0.624 ns) 8.642 ns shift_1\[1\]~5211 2 COMB LCCOMB_X15_Y15_N28 1 " "Info: 2: + IC(7.084 ns) + CELL(0.624 ns) = 8.642 ns; Loc. = LCCOMB_X15_Y15_N28; Fanout = 1; COMB Node = 'shift_1\[1\]~5211'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "7.708 ns" { af shift_1[1]~5211 } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 35 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.381 ns) + CELL(0.624 ns) 9.647 ns shift_1\[1\]~5212 3 COMB LCCOMB_X15_Y15_N14 1 " "Info: 3: + IC(0.381 ns) + CELL(0.624 ns) = 9.647 ns; Loc. = LCCOMB_X15_Y15_N14; Fanout = 1; COMB Node = 'shift_1\[1\]~5212'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.005 ns" { shift_1[1]~5211 shift_1[1]~5212 } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 35 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.600 ns) + CELL(0.370 ns) 10.617 ns shift_1\[1\]~5213 4 COMB LCCOMB_X14_Y15_N30 14 " "Info: 4: + IC(0.600 ns) + CELL(0.370 ns) = 10.617 ns; Loc. = LCCOMB_X14_Y15_N30; Fanout = 14; COMB Node = 'shift_1\[1\]~5213'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.970 ns" { shift_1[1]~5212 shift_1[1]~5213 } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 35 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.558 ns) + CELL(0.855 ns) 12.030 ns shift_1\[11\] 5 REG LCFF_X13_Y15_N11 4 " "Info: 5: + IC(0.558 ns) + CELL(0.855 ns) = 12.030 ns; Loc. = LCFF_X13_Y15_N11; Fanout = 4; REG Node = 'shift_1\[11\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.413 ns" { shift_1[1]~5213 shift_1[11] } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 35 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.407 ns ( 28.32 % ) " "Info: Total cell delay = 3.407 ns ( 28.32 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.623 ns ( 71.68 % ) " "Info: Total interconnect delay = 8.623 ns ( 71.68 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "12.030 ns" { af shift_1[1]~5211 shift_1[1]~5212 shift_1[1]~5213 shift_1[11] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "12.030 ns" { af af~combout shift_1[1]~5211 shift_1[1]~5212 shift_1[1]~5213 shift_1[11] } { 0.000ns 0.000ns 7.084ns 0.381ns 0.600ns 0.558ns } { 0.000ns 0.934ns 0.624ns 0.624ns 0.370ns 0.855ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 35 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk1khz destination 5.432 ns - Shortest register " "Info: - Shortest clock path from clock \"clk1khz\" to destination register is 5.432 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk1khz 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk1khz'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk1khz } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk1khz~clkctrl 2 COMB CLKCTRL_G2 5 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 5; COMB Node = 'clk1khz~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk1khz clk1khz~clkctrl } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.880 ns) + CELL(0.970 ns) 3.079 ns clk1_2hz 3 REG LCFF_X33_Y10_N7 2 " "Info: 3: + IC(0.880 ns) + CELL(0.970 ns) = 3.079 ns; Loc. = LCFF_X33_Y10_N7; Fanout = 2; REG Node = 'clk1_2hz'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.850 ns" { clk1khz~clkctrl clk1_2hz } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.756 ns) + CELL(0.000 ns) 3.835 ns clk1_2hz~clkctrl 4 COMB CLKCTRL_G7 26 " "Info: 4: + IC(0.756 ns) + CELL(0.000 ns) = 3.835 ns; Loc. = CLKCTRL_G7; Fanout = 26; COMB Node = 'clk1_2hz~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.756 ns" { clk1_2hz clk1_2hz~clkctrl } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.931 ns) + CELL(0.666 ns) 5.432 ns shift_1\[11\] 5 REG LCFF_X13_Y15_N11 4 " "Info: 5: + IC(0.931 ns) + CELL(0.666 ns) = 5.432 ns; Loc. = LCFF_X13_Y15_N11; Fanout = 4; REG Node = 'shift_1\[11\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.597 ns" { clk1_2hz~clkctrl shift_1[11] } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 35 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.726 ns ( 50.18 % ) " "Info: Total cell delay = 2.726 ns ( 50.18 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.706 ns ( 49.82 % ) " "Info: Total interconnect delay = 2.706 ns ( 49.82 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "5.432 ns" { clk1khz clk1khz~clkctrl clk1_2hz clk1_2hz~clkctrl shift_1[11] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "5.432 ns" { clk1khz clk1khz~combout clk1khz~clkctrl clk1_2hz clk1_2hz~clkctrl shift_1[11] } { 0.000ns 0.000ns 0.139ns 0.880ns 0.756ns 0.931ns } { 0.000ns 1.090ns 0.000ns 0.970ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "12.030 ns" { af shift_1[1]~5211 shift_1[1]~5212 shift_1[1]~5213 shift_1[11] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "12.030 ns" { af af~combout shift_1[1]~5211 shift_1[1]~5212 shift_1[1]~5213 shift_1[11] } { 0.000ns 0.000ns 7.084ns 0.381ns 0.600ns 0.558ns } { 0.000ns 0.934ns 0.624ns 0.624ns 0.370ns 0.855ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "5.432 ns" { clk1khz clk1khz~clkctrl clk1_2hz clk1_2hz~clkctrl shift_1[11] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "5.432 ns" { clk1khz clk1khz~combout clk1khz~clkctrl clk1_2hz clk1_2hz~clkctrl shift_1[11] } { 0.000ns 0.000ns 0.139ns 0.880ns 0.756ns 0.931ns } { 0.000ns 1.090ns 0.000ns 0.970ns 0.000ns 0.666ns } "" } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk1khz seg7\[2\] cnt\[0\] 17.062 ns register " "Info: tco from clock \"clk1khz\" to destination pin \"seg7\[2\]\" through register \"cnt\[0\]\" is 17.062 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk1khz source 2.827 ns + Longest register " "Info: + Longest clock path from clock \"clk1khz\" to source register is 2.827 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk1khz 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk1khz'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk1khz } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk1khz~clkctrl 2 COMB CLKCTRL_G2 5 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 5; COMB Node = 'clk1khz~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk1khz clk1khz~clkctrl } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.932 ns) + CELL(0.666 ns) 2.827 ns cnt\[0\] 3 REG LCFF_X32_Y1_N13 11 " "Info: 3: + IC(0.932 ns) + CELL(0.666 ns) = 2.827 ns; Loc. = LCFF_X32_Y1_N13; Fanout = 11; REG Node = 'cnt\[0\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.598 ns" { clk1khz~clkctrl cnt[0] } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 131 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.756 ns ( 62.12 % ) " "Info: Total cell delay = 1.756 ns ( 62.12 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.071 ns ( 37.88 % ) " "Info: Total interconnect delay = 1.071 ns ( 37.88 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.827 ns" { clk1khz clk1khz~clkctrl cnt[0] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.827 ns" { clk1khz clk1khz~combout clk1khz~clkctrl cnt[0] } { 0.000ns 0.000ns 0.139ns 0.932ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 131 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "13.931 ns + Longest register pin " "Info: + Longest register to pin delay is 13.931 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns cnt\[0\] 1 REG LCFF_X32_Y1_N13 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X32_Y1_N13; Fanout = 11; REG Node = 'cnt\[0\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { cnt[0] } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 131 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.522 ns) + CELL(0.624 ns) 5.146 ns Mux8~92 2 COMB LCCOMB_X13_Y16_N6 1 " "Info: 2: + IC(4.522 ns) + CELL(0.624 ns) = 5.146 ns; Loc. = LCCOMB_X13_Y16_N6; Fanout = 1; COMB Node = 'Mux8~92'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "5.146 ns" { cnt[0] Mux8~92 } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 140 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.413 ns) + CELL(0.615 ns) 6.174 ns Mux8~93 3 COMB LCCOMB_X13_Y16_N10 7 " "Info: 3: + IC(0.413 ns) + CELL(0.615 ns) = 6.174 ns; Loc. = LCCOMB_X13_Y16_N10; Fanout = 7; COMB Node = 'Mux8~93'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.028 ns" { Mux8~92 Mux8~93 } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 140 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.442 ns) + CELL(0.651 ns) 7.267 ns Mux18~25 4 COMB LCCOMB_X13_Y16_N18 1 " "Info: 4: + IC(0.442 ns) + CELL(0.651 ns) = 7.267 ns; Loc. = LCCOMB_X13_Y16_N18; Fanout = 1; COMB Node = 'Mux18~25'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.093 ns" { Mux8~93 Mux18~25 } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 151 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.618 ns) + CELL(3.046 ns) 13.931 ns seg7\[2\] 5 PIN PIN_87 0 " "Info: 5: + IC(3.618 ns) + CELL(3.046 ns) = 13.931 ns; Loc. = PIN_87; Fanout = 0; PIN Node = 'seg7\[2\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "6.664 ns" { Mux18~25 seg7[2] } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.936 ns ( 35.43 % ) " "Info: Total cell delay = 4.936 ns ( 35.43 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.995 ns ( 64.57 % ) " "Info: Total interconnect delay = 8.995 ns ( 64.57 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "13.931 ns" { cnt[0] Mux8~92 Mux8~93 Mux18~25 seg7[2] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "13.931 ns" { cnt[0] Mux8~92 Mux8~93 Mux18~25 seg7[2] } { 0.000ns 4.522ns 0.413ns 0.442ns 3.618ns } { 0.000ns 0.624ns 0.615ns 0.651ns 3.046ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "2.827 ns" { clk1khz clk1khz~clkctrl cnt[0] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "2.827 ns" { clk1khz clk1khz~combout clk1khz~clkctrl cnt[0] } { 0.000ns 0.000ns 0.139ns 0.932ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "13.931 ns" { cnt[0] Mux8~92 Mux8~93 Mux18~25 seg7[2] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "13.931 ns" { cnt[0] Mux8~92 Mux8~93 Mux18~25 seg7[2] } { 0.000ns 4.522ns 0.413ns 0.442ns 3.618ns } { 0.000ns 0.624ns 0.615ns 0.651ns 3.046ns } "" } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "ITDB_TH_RESULT" "shift_1\[0\] bj clk1khz -3.296 ns register " "Info: th for register \"shift_1\[0\]\" (data pin = \"bj\", clock pin = \"clk1khz\") is -3.296 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk1khz destination 5.432 ns + Longest register " "Info: + Longest clock path from clock \"clk1khz\" to destination register is 5.432 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk1khz 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk1khz'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk1khz } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk1khz~clkctrl 2 COMB CLKCTRL_G2 5 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 5; COMB Node = 'clk1khz~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk1khz clk1khz~clkctrl } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.880 ns) + CELL(0.970 ns) 3.079 ns clk1_2hz 3 REG LCFF_X33_Y10_N7 2 " "Info: 3: + IC(0.880 ns) + CELL(0.970 ns) = 3.079 ns; Loc. = LCFF_X33_Y10_N7; Fanout = 2; REG Node = 'clk1_2hz'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.850 ns" { clk1khz~clkctrl clk1_2hz } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.756 ns) + CELL(0.000 ns) 3.835 ns clk1_2hz~clkctrl 4 COMB CLKCTRL_G7 26 " "Info: 4: + IC(0.756 ns) + CELL(0.000 ns) = 3.835 ns; Loc. = CLKCTRL_G7; Fanout = 26; COMB Node = 'clk1_2hz~clkctrl'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.756 ns" { clk1_2hz clk1_2hz~clkctrl } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.931 ns) + CELL(0.666 ns) 5.432 ns shift_1\[0\] 5 REG LCFF_X15_Y15_N31 5 " "Info: 5: + IC(0.931 ns) + CELL(0.666 ns) = 5.432 ns; Loc. = LCFF_X15_Y15_N31; Fanout = 5; REG Node = 'shift_1\[0\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "1.597 ns" { clk1_2hz~clkctrl shift_1[0] } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 35 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.726 ns ( 50.18 % ) " "Info: Total cell delay = 2.726 ns ( 50.18 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.706 ns ( 49.82 % ) " "Info: Total interconnect delay = 2.706 ns ( 49.82 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "5.432 ns" { clk1khz clk1khz~clkctrl clk1_2hz clk1_2hz~clkctrl shift_1[0] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "5.432 ns" { clk1khz clk1khz~combout clk1khz~clkctrl clk1_2hz clk1_2hz~clkctrl shift_1[0] } { 0.000ns 0.000ns 0.139ns 0.880ns 0.756ns 0.931ns } { 0.000ns 1.090ns 0.000ns 0.970ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TH_DELAY" "0.306 ns + " "Info: + Micro hold delay of destination is 0.306 ns" {  } { { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 35 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.034 ns - Shortest pin register " "Info: - Shortest pin to register delay is 9.034 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.944 ns) 0.944 ns bj 1 PIN PIN_63 5 " "Info: 1: + IC(0.000 ns) + CELL(0.944 ns) = 0.944 ns; Loc. = PIN_63; Fanout = 5; PIN Node = 'bj'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "" { bj } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(7.030 ns) + CELL(0.370 ns) 8.344 ns shift_1~5204 2 COMB LCCOMB_X15_Y15_N6 1 " "Info: 2: + IC(7.030 ns) + CELL(0.370 ns) = 8.344 ns; Loc. = LCCOMB_X15_Y15_N6; Fanout = 1; COMB Node = 'shift_1~5204'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "7.400 ns" { bj shift_1~5204 } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 33 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.376 ns) + CELL(0.206 ns) 8.926 ns shift_1\[0\]~2739 3 COMB LCCOMB_X15_Y15_N30 1 " "Info: 3: + IC(0.376 ns) + CELL(0.206 ns) = 8.926 ns; Loc. = LCCOMB_X15_Y15_N30; Fanout = 1; COMB Node = 'shift_1\[0\]~2739'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.582 ns" { shift_1~5204 shift_1[0]~2739 } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 35 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 9.034 ns shift_1\[0\] 4 REG LCFF_X15_Y15_N31 5 " "Info: 4: + IC(0.000 ns) + CELL(0.108 ns) = 9.034 ns; Loc. = LCFF_X15_Y15_N31; Fanout = 5; REG Node = 'shift_1\[0\]'" {  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { shift_1[0]~2739 shift_1[0] } "NODE_NAME" } } { "ping_pang.vhd" "" { Text "D:/my_eda2/ping_pang/ping_pang.vhd" 35 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.628 ns ( 18.02 % ) " "Info: Total cell delay = 1.628 ns ( 18.02 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.406 ns ( 81.98 % ) " "Info: Total interconnect delay = 7.406 ns ( 81.98 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "9.034 ns" { bj shift_1~5204 shift_1[0]~2739 shift_1[0] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "9.034 ns" { bj bj~combout shift_1~5204 shift_1[0]~2739 shift_1[0] } { 0.000ns 0.000ns 7.030ns 0.376ns 0.000ns } { 0.000ns 0.944ns 0.370ns 0.206ns 0.108ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "5.432 ns" { clk1khz clk1khz~clkctrl clk1_2hz clk1_2hz~clkctrl shift_1[0] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "5.432 ns" { clk1khz clk1khz~combout clk1khz~clkctrl clk1_2hz clk1_2hz~clkctrl shift_1[0] } { 0.000ns 0.000ns 0.139ns 0.880ns 0.756ns 0.931ns } { 0.000ns 1.090ns 0.000ns 0.970ns 0.000ns 0.666ns } "" } } { "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/quartus ii7.0/quartus/bin/TimingClosureFloorplan.fld" "" "9.034 ns" { bj shift_1~5204 shift_1[0]~2739 shift_1[0] } "NODE_NAME" } } { "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus ii7.0/quartus/bin/Technology_Viewer.qrui" "9.034 ns" { bj bj~combout shift_1~5204 shift_1[0]~2739 shift_1[0] } { 0.000ns 0.000ns 7.030ns 0.376ns 0.000ns } { 0.000ns 0.944ns 0.370ns 0.206ns 0.108ns } "" } }  } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}