lpm_rom.map.qmsg

基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件）

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.0 Build 33 02/05/2007 SJ Full Version " "Info: Version 7.0 Build 33 02/05/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Apr 23 11:01:22 2007 " "Info: Processing started: Mon Apr 23 11:01:22 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off lpm_rom -c lpm_rom " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off lpm_rom -c lpm_rom" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Warning" "WSGN_MEGAFN_REPLACE" "lpm_rom D:/my_eda2/lpm_rom/lpm_rom.bdf " "Warning: Entity \"lpm_rom\" obtained from \"D:/my_eda2/lpm_rom/lpm_rom.bdf\" instead of from Quartus II megafunction library" {  } {  } 0 0 "Entity \"%1!s!\" obtained from \"%2!s!\" instead of from Quartus II megafunction library" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "lpm_rom.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file lpm_rom.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_rom " "Info: Found entity 1: lpm_rom" {  } { { "lpm_rom.bdf" "" { Schematic "D:/my_eda2/lpm_rom/lpm_rom.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "lpm_rom " "Info: Elaborating entity \"lpm_rom\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "rom.vhd 2 1 " "Warning: Using design file rom.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 rom-SYN " "Info: Found design unit 1: rom-SYN" {  } { { "rom.vhd" "" { Text "D:/my_eda2/lpm_rom/rom.vhd" 52 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 rom " "Info: Found entity 1: rom" {  } { { "rom.vhd" "" { Text "D:/my_eda2/lpm_rom/rom.vhd" 42 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "rom rom:inst " "Info: Elaborating entity \"rom\" for hierarchy \"rom:inst\"" {  } { { "lpm_rom.bdf" "inst" { Schematic "D:/my_eda2/lpm_rom/lpm_rom.bdf" { { 88 184 336 184 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/quartus ii7.0/quartus/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file e:/altera/quartus ii7.0/quartus/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "e:/altera/quartus ii7.0/quartus/libraries/megafunctions/altsyncram.tdf" 434 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram rom:inst\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"rom:inst\|altsyncram:altsyncram_component\"" {  } { { "rom.vhd" "altsyncram_component" { Text "D:/my_eda2/lpm_rom/rom.vhd" 84 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "rom:inst\|altsyncram:altsyncram_component " "Info: Elaborated megafunction instantiation \"rom:inst\|altsyncram:altsyncram_component\"" {  } { { "rom.vhd" "" { Text "D:/my_eda2/lpm_rom/rom.vhd" 84 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_h571.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_h571.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_h571 " "Info: Found entity 1: altsyncram_h571" {  } { { "db/altsyncram_h571.tdf" "" { Text "D:/my_eda2/lpm_rom/db/altsyncram_h571.tdf" 36 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_h571 rom:inst\|altsyncram:altsyncram_component\|altsyncram_h571:auto_generated " "Info: Elaborating entity \"altsyncram_h571\" for hierarchy \"rom:inst\|altsyncram:altsyncram_component\|altsyncram_h571:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "e:/altera/quartus ii7.0/quartus/libraries/megafunctions/altsyncram.tdf" 917 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "22 " "Info: Implemented 22 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "6 " "Info: Implemented 6 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "8 " "Info: Implemented 8 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_RAMS" "8 " "Info: Implemented 8 RAM segments" {  } {  } 0 0 "Implemented %1!d! RAM segments" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 2 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "146 " "Info: Allocated 146 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Mon Apr 23 11:01:32 2007 " "Info: Processing ended: Mon Apr 23 11:01:32 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:10 " "Info: Elapsed time: 00:00:10" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}