main0505.c

DSP240 用的程序 电机及基本的 希望有用的朋友

#include "C240.h" 
#define TRUE   1
#define FALSE  0
#define VELOCITY_CONST 3125000  
/* define variable */ 
static unsigned int PBvalue[6];  
unsigned int CAP_A;
unsigned int CAP_B;
unsigned int CAP_C;
unsigned int IA_max,IB_max,IC_max;   /* MAX limit for current */
unsigned int IA_min,IB_min,IC_min;   /* MIN limit for current */
unsigned int ADC_channel;            /* Channel for A/D convert */
int display_times;                   /* accumulation for display */
int T3overflow_counter;              /* T3 overflow times */
int input_state;
int sign_state;
int start_mode;
int start_state;
int revert_state;
int dot_state;  
int CAP1_flag;                       
int inputdata_num;  
unsigned int input_value; 
unsigned int input_dotbit;
unsigned int position_value; 
unsigned int position_dotbit;
unsigned int position;
unsigned int velocity_value; 
unsigned int velocity_dotbit; 
unsigned int int_position;
int display_order;        /* 1 while display velocity ,2 while display current ,3 while display input data */
/* define Input/Output variable value */
ioport unsigned int port0,port1,port2,port3,port4,port5; 
/* define structure type and variable value */  
struct CAP_INT
	{
	 unsigned int CAP_value;         /* the capture value of CAP unit */
	 unsigned long delta_count;      /* the delta value of 2 times ajacent capture value */
	 struct  CAP_INT * next;
	};
struct CAP_INT * CAP_p,* angle_p; 

/*********************************************/
/* Creat circle linkage table for CAP */
struct CAP_INT * creat_link()
{
 int i;
 struct CAP_INT * h,* p;             /* pointer h point to virtual value  */
 h=(struct CAP_INT *)malloc(sizeof(struct CAP_INT));
 h->next=h;
 for(i=1;i<=5;i++)
 	{
  	p=(struct CAP_INT *)malloc(sizeof(struct CAP_INT));
  	p->CAP_value=0;
  	p->delta_count=0xffff;
  	p->next=h->next;
  	h->next=p;
 	}
 return (h);                         /* return head pointer */
}  

/*********************************************/                  
void ADC_ISR() 
{
 unsigned int x1,x2,channel,I_MAX,I_MIN;
 x1=ADCFIFO1; 
 x2=x1>>6; 
 switch(ADC_channel)
 {
 	case 2:I_MAX=IA_max;
 		   I_MIN=IA_min;
    case 3:I_MAX=IB_max;
           I_MIN=IB_min;
    case 4:I_MAX=IC_max;
           I_MIN=IC_min;
    default:break;
 }
 if (x2>=I_MAX) 
	 PADATDIR=PADATDIR & (~(1<<(ADC_channel-2)));
 else if (x2<=I_MIN)
	 PADATDIR=PADATDIR | (1<<(ADC_channel-2));  
 ADC_channel++;
 if (ADC_channel>4)
 	ADC_channel=2;
 channel=ADC_channel;	 
 ADCTRL1=0xcb00+(channel<<1);
}                                               
/*********************************************/                  

/*********************************************/                  
void dsp_setup() 
{
 unsigned int temp;
 /*********************************************/
 /* Disable watchdog timer */
 /*********************************************/
 temp = WDCR;
 temp = temp|0x68;
 WDCR = temp;
 /*********************************************/
 /* initialize PLL module (20 MHz XTAL1) */
 /*********************************************/
 CKCR1 = 0x60;      	             /* crystal=20MHz CPUCLK = 20MHz */
                    	             /* and 1x PLL mult ratio */
 CKCR0 = 0xc3;      	             /* low–power mode 0, */
                    	             /* ACLK enabled, */
                                 	 /* PLL enabled, */
                    	             /* SYSCLK=CPUCLK/2 */
 SYSCR = 0x40c0;  
 
 XINT1CR=0x0007;
}
 

/* Initiate the event management register */
void eventmgr_init()
{
 
 GPTCON=0x0442; 
 /* T2 period interrupt start A/D */ 
 /* Initialize PWM */
 /* Period is 100us */          
 ACTR=0x09aa;
 CMPR1=0x0220;
 CMPR2=0x0220;
 CMPR3=0x0220;
 DBTCON=0x0000;
 COMCON=0x4a57;
 COMCON=0xca57;
 T1PER=0x07d0;   
 T1CON=0x0000; 
 T1CON=0x910e; 
 /* Initial timer  2 */
 /* Initialize T2 */ 
 T2CNT=0x00;
 T2PER=0x0190;     		  /* Period is 20us */
 T2CON=0x9040;

 /* Setup shared pins */
 OCRA = 0xf800;     	             /* pins IOPB0–IOPB3 & IOPA0–IOPA2 to I/O pins */
 OCRB = 0x00f1;      	             /* pins are: ADSOC, XF, /BIO, CAP1–CAP4 */ 
 PBDATDIR = 0x0700;
 /* outputs IOPB0–IOPB2, set low */
 PADATDIR = 0x0707; 	             /* outputs IOPA0–IOPA2, set high */
 /* Initialize T3 */
 T3CNT=0x0;
 T3PER=0xffff;
 T3CON=0x9440;                       /* Prescaler=/16 */
 /* Setup capture units */
 CAPCON = 0x0;    	                 /* reset capture control register */
 CAPFIFO= 0x0ff;                     /* Clear FIFO’s */
 CAPCON = 0xb6fc;                    /* enable #1,#2,#3 use Timer3, both edges */    
 /* enable PWM output */
 T1CON=0x914e; 
 /* start ADC */
 ADCTRL1=0xcb04;
 ADCTRL2=0x0404;
 ADC_channel=2;
} 

/*******************************************************************/
void disable_interrupts()
{
 asm(" SETC INTM");
}

/************************************************************************/
void enable_interrupts() 
{
 IFR  = 0xffff;                      /* Clear pending interrupts */
 IFRA = 0xffff;
 IFRB = 0xffff;
 IFRC = 0xffff;
 IMR  = 0x002e;                      /* Enable CPU Interrupts:INT 2,3,4,6 */
 IMRA = 0x0080;                      /* Enable timer 1 period  interrupts */
 IMRB = 0x0010;            /* Enable timer 3 period */
 IMRC = 0x0007;            /* Enable CAP1~3 interrupts*/
 asm(" CLRC INTM");                  /* Global interrupt enable */
}

/* initiating parameter and register */
void init_SRM()
{
 velocity_value=0;
 velocity_dotbit=4;
 position_value=position=0;
 T3overflow_counter=0;
 position_dotbit=4;
 input_value=0; 
 input_dotbit=4;
 display_times=0;
 input_state=FALSE; 
 sign_state=FALSE; 
 dot_state=FALSE;
 display_order=3;
 inputdata_num=0;
 start_mode=TRUE;
 start_state=FALSE;
 revert_state=FALSE; 
 CAP_A=CAP_B=CAP_C=0;
 IA_max=IB_max=IC_max=0x023b; /* 4A,  Voltage from LEM is 2.793V */ 
 IA_min=IB_min=IC_min=0x0230; /* 3.3A,Voltage from LEM is 2.738V */ 
}


/********************************************************** */
/* READ CAPTURE FIFO REGISTERS 
/* This routine is used to read the data from the capture FIFO
/* registers.
/*
/* inputs: capture = which FIFO to read?
/* range = 1–3
/* outputs fifo_data =
/* range = 0–65535
/********************************************************* */
unsigned int read_fifo(int capture)
{
 unsigned int fifo_data;
 int fifo_status;
 if (capture == 1) 
	{
	 do {
		fifo_data = FIFO1;                /* read value */
		fifo_status = CAPFIFO & 0x0300;   /* read status register, mask bits */
		} 
	 while (fifo_status != 0);
	}
 else if (capture == 2) 
	{
	 do {
		fifo_data = FIFO2;                /* read value */
		fifo_status = CAPFIFO & 0x0c00;   /* read status register, mask bits */
		}
	 while (fifo_status != 0);
	}
 else if (capture == 3) 
	{
	 do {
		fifo_data = FIFO3;                /* read value */
		fifo_status = CAPFIFO & 0x3000;   /* read status register, mask bits */
	    }
	 while (fifo_status !=0);
	}
 else fifo_data = 0xffff;    	          /* error, not a valid capture */
 return fifo_data;
}
/* ISR for GPT1 interrupt */
void c_int2()
{
 IFR=0x0002;                       /* clear CPU interrupt flag */
 IFRA=0x7ff;
 display_times++;
}
/* ISR for GPT3 interrupt */
void c_int3()
{
 IFR=0x0004;                         /* clear CPU interrupt flag */
 IFRB=0x0ff;
 T3overflow_counter++;
}

/* ISR for CAP unit interrupt */
void c_int4()
{
 int groupc_flags;
 int capture; 
 struct CAP_INT * p;
 IFR=0x0008;                         /* clear CPU interrupt flag */
 
 groupc_flags = IFRC;                /* read event manger interrupt */
 /* flag register */    
 if ((groupc_flags & 0x07)==0)
	{
	 /* not a valid capture */
	 IFRC = 0xff;
	 capture = 0;
	} 
 p=CAP_p;                        
 CAP_p=CAP_p->next;
if (groupc_flags & 0x1)
 	{ 
 	 /* capture #1 */
 	 IFRC = 0xf9;                    /* clear flag register */
	 capture = 1;
	 if (CAP1_flag)
	     { 
	       if (CAP_A)
	       {    PBDATDIR=0x0704;
	            CAP_A=0;
	       }
	       else
	            CAP_A=1; 
	 	   
	 	 }		
	 }
else if (groupc_flags & 0x2)
	{
	 /* capture #2 */
	 IFRC = 0xfa;
	 capture = 2;
	 CAP1_flag=TRUE;
	 if (CAP_B)
	 {   CAP_B=0;
	     PBDATDIR=0x0701;
	 }
	 else
	     CAP_B=1; 
	  
	}
else if (groupc_flags & 0x4) 
	{
	 /* capture #3 */
	 IFRC = 0xfc;
	 capture = 3;