stb7109reg.h

采用ST20 CPU的机顶盒的烧写程序

/*
 * Copyright (C) STMicroelectronics Ltd. 2005, 2006, 2007.
 *
 * All rights reserved.
 */

#ifndef __STB7109REG_H
#define __STB7109REG_H

#include "sh4regtype.h"

/*----------------------------------------------------------------------------*/

/*
 * Peripheral versions
 */

#ifndef ST40_LMI_VERSION
#define ST40_LMI_VERSION 3
#endif

/*----------------------------------------------------------------------------*/

/*
 * Base addresses for control register banks.
 *
 * Define SH4REG_MM_PHYSICAL_ADDRESSES if the addresses should be defined as
 * physical addresses instead of P2 region addresses for registers not in P4.
 *
 * Define STB7109_MOVE_LMI_REGS to 0 in order to keep the LMI configuration
 * registers at their reset addresses (by default the connection scripts and
 * bootstrap memory initialisations will move these registers to their area 6
 * addresses). Note this cannot be done for pre cut 3.0 silicon.
 */

/* Area 6 on-chip peripherals base */
#ifndef STB7109_AREA6_PERIPH_BASE
#ifdef SH4REG_MM_PHYSICAL_ADDRESSES
#define STB7109_AREA6_PERIPH_BASE 0x18000000
#else
#define STB7109_AREA6_PERIPH_BASE 0xb8000000
#endif
#endif

#ifndef STB7109_MOVE_LMI_REGS
#define STB7109_MOVE_LMI_REGS 1
#endif

/* Generic SH4 control registers */
#ifndef SH4_TMU_REGS_BASE
#define SH4_TMU_REGS_BASE 0xffd80000
#endif
#ifndef SH4_RTC_REGS_BASE
#define SH4_RTC_REGS_BASE 0xffc80000
#endif

/* Common ST40 control registers */
#ifndef ST40_CPG_REGS_BASE
#define ST40_CPG_REGS_BASE 0xffc00000
#endif
#ifndef ST40_INTC_REGS_BASE
#define ST40_INTC_REGS_BASE 0xffd00000
#endif
#ifndef ST40_SCIF2_REGS_BASE
#define ST40_SCIF2_REGS_BASE 0xffe80000
#endif

#ifndef ST40_ILC_REGS_BASE
#define ST40_ILC_REGS_BASE STB7109_AREA6_PERIPH_BASE
#endif
#ifndef ST40_INTC2_REGS_BASE
#define ST40_INTC2_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x01001300)
#endif

/* STb7109 control registers */
#ifndef STB7109_SYSCONF_REGS_BASE
#define STB7109_SYSCONF_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x01001000)
#endif

#ifndef STB7109_CLOCKGENA_REGS_BASE
#define STB7109_CLOCKGENA_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x01213000)
#endif

#ifndef STB7109_STBUS_NODE01_REGS_BASE
#define STB7109_STBUS_NODE01_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x01216000)
#endif
#ifndef STB7109_STBUS_NODE04_REGS_BASE
#define STB7109_STBUS_NODE04_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x01216200)
#endif
#ifndef STB7109_STBUS_NODE05_REGS_BASE
#define STB7109_STBUS_NODE05_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x0120d200)
#endif
#ifndef STB7109_STBUS_NODE09_REGS_BASE
#define STB7109_STBUS_NODE09_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x0120d000)
#endif
#ifndef STB7109_STBUS_NODE11_REGS_BASE
#define STB7109_STBUS_NODE11_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x01243000)
#endif

/* System Architecture Volume 2: Bus Interfaces */
#ifndef ST40_LMISYS_REGS_BASE
#if STB7109_MOVE_LMI_REGS
#define ST40_LMISYS_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x02800000)
#else
#ifdef SH4REG_MM_PHYSICAL_ADDRESSES
#define ST40_LMISYS_REGS_BASE 0x0f000000
#else
#define ST40_LMISYS_REGS_BASE 0xaf000000
#endif
#endif
#endif
#ifndef ST40_LMIVID_REGS_BASE
#if STB7109_MOVE_LMI_REGS
#define ST40_LMIVID_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x03000000)
#else
#ifdef SH4REG_MM_PHYSICAL_ADDRESSES
#define ST40_LMIVID_REGS_BASE 0x17000000
#else
#define ST40_LMIVID_REGS_BASE 0xb7000000
#endif
#endif
#endif
#ifndef ST40_EMI_REGS_BASE
#define ST40_EMI_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x02100000)
#endif

/* System Architecture Volume 4: I/O Devices */
#ifndef ST40_PIO0_REGS_BASE
#define ST40_PIO0_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x00020000)
#endif
#ifndef ST40_PIO1_REGS_BASE
#define ST40_PIO1_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x00021000)
#endif
#ifndef ST40_PIO2_REGS_BASE
#define ST40_PIO2_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x00022000)
#endif
#ifndef ST40_PIO3_REGS_BASE
#define ST40_PIO3_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x00023000)
#endif
#ifndef ST40_PIO4_REGS_BASE
#define ST40_PIO4_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x00024000)
#endif
#ifndef ST40_PIO5_REGS_BASE
#define ST40_PIO5_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x00025000)
#endif
#ifndef ST40_ASC0_REGS_BASE
#define ST40_ASC0_REGS_BASE (STB7109_AREA6_PERIPH_BASE + 0x00030000)
#endif
#ifndef ST40_ASC1_REGS_BASE