📄 interlace.fit.eqn
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--G1_dout is RAM_MN_dual:inst5|dout at LCFF_X28_Y31_N31
G1_dout = DFFEAS(G1L27, GLOBAL(A1L3), , , , , , inst14, );
--H1_dout is RAM_MN_dual2:inst6|dout at LCFF_X28_Y30_N1
H1_dout = DFFEAS(H1L11, GLOBAL(A1L3), , , , , , !inst14, );
--E1L1 is cobination:inst12|d1d2~10 at LCCOMB_X28_Y31_N24
E1L1 = H1_dout $ G1_dout;
--L1_dout is jie_RAM_MN_dual2:inst10|dout at LCFF_X25_Y31_N5
L1_dout = DFFEAS(L1L27, GLOBAL(A1L3), , , , , , inst14, );
--D1_dout is jie_RAM_MN_dual:inst2|dout at LCFF_X25_Y30_N9
D1_dout = DFFEAS(D1L11, GLOBAL(A1L3), , , , , , !inst14, );
--E2L1 is cobination:inst3|d1d2~10 at LCCOMB_X23_Y35_N18
E2L1 = D1_dout $ L1_dout;
--inst14 is inst14 at LCFF_X28_Y32_N9
inst14 = DFFEAS(J1L1, GLOBAL(A1L3), , , , , , , );
--C1_series_addr[3] is jie_counter:inst1|series_addr[3] at LCFF_X28_Y32_N3
C1_series_addr[3] = DFFEAS(C1L31, GLOBAL(A1L3), , , , , , , );
--C1_series_addr[2] is jie_counter:inst1|series_addr[2] at LCFF_X28_Y32_N5
C1_series_addr[2] = DFFEAS(C1L29, GLOBAL(A1L3), , , , , , , );
--C1_series_addr[1] is jie_counter:inst1|series_addr[1] at LCFF_X28_Y32_N15
C1_series_addr[1] = DFFEAS(C1L1, GLOBAL(A1L3), , , , , , , );
--C1_series_addr[0] is jie_counter:inst1|series_addr[0] at LCFF_X25_Y30_N21
C1_series_addr[0] = DFFEAS(C1L26, GLOBAL(A1L3), , , , , , , );
--K1_seq_addr[3] is rom_mn_seq:inst9|seq_addr[3] at LCFF_X27_Y31_N19
K1_seq_addr[3] = DFFEAS(UNCONNECTED_DATAIN, GLOBAL(A1L3), , , , C1_series_addr[3], , , VCC);
--K1_seq_addr[2] is rom_mn_seq:inst9|seq_addr[2] at LCFF_X27_Y31_N15
K1_seq_addr[2] = DFFEAS(UNCONNECTED_DATAIN, GLOBAL(A1L3), , , , C1_series_addr[2], , , VCC);
--K1_seq_addr[1] is rom_mn_seq:inst9|seq_addr[1] at LCFF_X27_Y31_N31
K1_seq_addr[1] = DFFEAS(UNCONNECTED_DATAIN, GLOBAL(A1L3), , , , C1_series_addr[1], , , VCC);
--G1_ram[14] is RAM_MN_dual:inst5|ram[14] at LCFF_X28_Y32_N1
G1_ram[14] = DFFEAS(G1L58, GLOBAL(A1L3), , , , , , , );
--G1_ram[13] is RAM_MN_dual:inst5|ram[13] at LCFF_X29_Y31_N11
G1_ram[13] = DFFEAS(G1L56, GLOBAL(A1L3), , , , , , , );
--G1_ram[12] is RAM_MN_dual:inst5|ram[12] at LCFF_X29_Y31_N25
G1_ram[12] = DFFEAS(G1L54, GLOBAL(A1L3), , , , , , , );
--G1L18 is RAM_MN_dual:inst5|Mux~56 at LCCOMB_X28_Y31_N16
G1L18 = K1_seq_addr[2] & (K1_seq_addr[3] # G1_ram[13]) # !K1_seq_addr[2] & !K1_seq_addr[3] & (G1_ram[12]);
--G1_ram[15] is RAM_MN_dual:inst5|ram[15] at LCFF_X29_Y31_N29
G1_ram[15] = DFFEAS(G1L60, GLOBAL(A1L3), , , , , , , );
--G1L19 is RAM_MN_dual:inst5|Mux~57 at LCCOMB_X28_Y31_N28
G1L19 = G1L18 & (G1_ram[15] # !K1_seq_addr[3]) # !G1L18 & K1_seq_addr[3] & (G1_ram[14]);
--G1_ram[1] is RAM_MN_dual:inst5|ram[1] at LCFF_X29_Y31_N15
G1_ram[1] = DFFEAS(G1L32, GLOBAL(A1L3), , , , , , , );
--G1_ram[2] is RAM_MN_dual:inst5|ram[2] at LCFF_X29_Y31_N9
G1_ram[2] = DFFEAS(G1L34, GLOBAL(A1L3), , , , , , , );
--G1_ram[0] is RAM_MN_dual:inst5|ram[0] at LCFF_X29_Y31_N19
G1_ram[0] = DFFEAS(G1L30, GLOBAL(A1L3), , , , , , , );
--G1L20 is RAM_MN_dual:inst5|Mux~58 at LCCOMB_X28_Y31_N22
G1L20 = K1_seq_addr[2] & K1_seq_addr[3] # !K1_seq_addr[2] & (K1_seq_addr[3] & G1_ram[2] # !K1_seq_addr[3] & (G1_ram[0]));
--G1_ram[3] is RAM_MN_dual:inst5|ram[3] at LCFF_X29_Y31_N31
G1_ram[3] = DFFEAS(G1L36, GLOBAL(A1L3), , , , , , , );
--G1L21 is RAM_MN_dual:inst5|Mux~59 at LCCOMB_X28_Y31_N8
G1L21 = K1_seq_addr[2] & (G1L20 & (G1_ram[3]) # !G1L20 & G1_ram[1]) # !K1_seq_addr[2] & G1L20;
--G1_ram[10] is RAM_MN_dual:inst5|ram[10] at LCFF_X29_Y31_N3
G1_ram[10] = DFFEAS(G1L50, GLOBAL(A1L3), , , , , , , );
--G1_ram[9] is RAM_MN_dual:inst5|ram[9] at LCFF_X27_Y31_N5
G1_ram[9] = DFFEAS(G1L48, GLOBAL(A1L3), , , , , , , );
--G1_ram[8] is RAM_MN_dual:inst5|ram[8] at LCFF_X27_Y31_N3
G1_ram[8] = DFFEAS(G1L46, GLOBAL(A1L3), , , , , , , );
--G1L22 is RAM_MN_dual:inst5|Mux~60 at LCCOMB_X27_Y31_N18
G1L22 = K1_seq_addr[2] & (G1_ram[9] # K1_seq_addr[3]) # !K1_seq_addr[2] & (!K1_seq_addr[3] & G1_ram[8]);
--G1_ram[11] is RAM_MN_dual:inst5|ram[11] at LCFF_X27_Y30_N11
G1_ram[11] = DFFEAS(G1L52, GLOBAL(A1L3), , , , , , , );
--G1L23 is RAM_MN_dual:inst5|Mux~61 at LCCOMB_X28_Y31_N18
G1L23 = K1_seq_addr[3] & (G1L22 & (G1_ram[11]) # !G1L22 & G1_ram[10]) # !K1_seq_addr[3] & (G1L22);
--G1L24 is RAM_MN_dual:inst5|Mux~62 at LCCOMB_X28_Y31_N4
G1L24 = C1_series_addr[0] & (K1_seq_addr[1]) # !C1_series_addr[0] & (K1_seq_addr[1] & G1L21 # !K1_seq_addr[1] & (G1L23));
--G1_ram[5] is RAM_MN_dual:inst5|ram[5] at LCFF_X29_Y30_N9
G1_ram[5] = DFFEAS(G1L40, GLOBAL(A1L3), , , , , , , );
--G1_ram[6] is RAM_MN_dual:inst5|ram[6] at LCFF_X29_Y30_N21
G1_ram[6] = DFFEAS(G1L42, GLOBAL(A1L3), , , , , , , );
--G1_ram[4] is RAM_MN_dual:inst5|ram[4] at LCFF_X29_Y30_N5
G1_ram[4] = DFFEAS(G1L38, GLOBAL(A1L3), , , , , , , );
--G1L25 is RAM_MN_dual:inst5|Mux~63 at LCCOMB_X28_Y31_N6
G1L25 = K1_seq_addr[2] & K1_seq_addr[3] # !K1_seq_addr[2] & (K1_seq_addr[3] & G1_ram[6] # !K1_seq_addr[3] & (G1_ram[4]));
--G1_ram[7] is RAM_MN_dual:inst5|ram[7] at LCFF_X29_Y30_N1
G1_ram[7] = DFFEAS(G1L44, GLOBAL(A1L3), , , , , , , );
--G1L26 is RAM_MN_dual:inst5|Mux~64 at LCCOMB_X28_Y31_N0
G1L26 = K1_seq_addr[2] & (G1L25 & G1_ram[7] # !G1L25 & (G1_ram[5])) # !K1_seq_addr[2] & (G1L25);
--G1L27 is RAM_MN_dual:inst5|Mux~65 at LCCOMB_X28_Y31_N30
G1L27 = C1_series_addr[0] & (G1L24 & (G1L26) # !G1L24 & G1L19) # !C1_series_addr[0] & (G1L24);
--H1_ram[4] is RAM_MN_dual2:inst6|ram[4] at LCFF_X29_Y30_N11
H1_ram[4] = DFFEAS(H1L22, GLOBAL(A1L3), , , , , , , );
--H1_ram[14] is RAM_MN_dual2:inst6|ram[14] at LCFF_X28_Y32_N13
H1_ram[14] = DFFEAS(H1L42, GLOBAL(A1L3), , , , , , , );
--H1_ram[12] is RAM_MN_dual2:inst6|ram[12] at LCFF_X29_Y31_N7
H1_ram[12] = DFFEAS(H1L38, GLOBAL(A1L3), , , , , , , );
--H1L2 is RAM_MN_dual2:inst6|Mux~56 at LCCOMB_X28_Y30_N18
H1L2 = K1_seq_addr[1] & (K1_seq_addr[3]) # !K1_seq_addr[1] & (K1_seq_addr[3] & H1_ram[14] # !K1_seq_addr[3] & (H1_ram[12]));
--H1_ram[6] is RAM_MN_dual2:inst6|ram[6] at LCFF_X29_Y30_N29
H1_ram[6] = DFFEAS(H1L26, GLOBAL(A1L3), , , , , , , );
--H1L3 is RAM_MN_dual2:inst6|Mux~57 at LCCOMB_X28_Y30_N20
H1L3 = K1_seq_addr[1] & (H1L2 & (H1_ram[6]) # !H1L2 & H1_ram[4]) # !K1_seq_addr[1] & H1L2;
--H1_ram[1] is RAM_MN_dual2:inst6|ram[1] at LCFF_X29_Y31_N1
H1_ram[1] = DFFEAS(H1L16, GLOBAL(A1L3), , , , , , , );
--H1_ram[11] is RAM_MN_dual2:inst6|ram[11] at LCFF_X27_Y30_N19
H1_ram[11] = DFFEAS(H1L36, GLOBAL(A1L3), , , , , , , );
--H1_ram[9] is RAM_MN_dual2:inst6|ram[9] at LCFF_X27_Y31_N27
H1_ram[9] = DFFEAS(H1L32, GLOBAL(A1L3), , , , , , , );
--H1L4 is RAM_MN_dual2:inst6|Mux~58 at LCCOMB_X28_Y30_N28
H1L4 = K1_seq_addr[1] & (K1_seq_addr[3]) # !K1_seq_addr[1] & (K1_seq_addr[3] & H1_ram[11] # !K1_seq_addr[3] & (H1_ram[9]));
--H1_ram[3] is RAM_MN_dual2:inst6|ram[3] at LCFF_X29_Y31_N17
H1_ram[3] = DFFEAS(H1L20, GLOBAL(A1L3), , , , , , , );
--H1L5 is RAM_MN_dual2:inst6|Mux~59 at LCCOMB_X28_Y30_N10
H1L5 = K1_seq_addr[1] & (H1L4 & (H1_ram[3]) # !H1L4 & H1_ram[1]) # !K1_seq_addr[1] & (H1L4);
--H1_ram[0] is RAM_MN_dual2:inst6|ram[0] at LCFF_X29_Y31_N5
H1_ram[0] = DFFEAS(H1L14, GLOBAL(A1L3), , , , , , , );
--H1_ram[10] is RAM_MN_dual2:inst6|ram[10] at LCFF_X29_Y31_N27
H1_ram[10] = DFFEAS(H1L34, GLOBAL(A1L3), , , , , , , );
--H1_ram[8] is RAM_MN_dual2:inst6|ram[8] at LCFF_X27_Y31_N13
H1_ram[8] = DFFEAS(H1L30, GLOBAL(A1L3), , , , , , , );
--H1L6 is RAM_MN_dual2:inst6|Mux~60 at LCCOMB_X27_Y31_N30
H1L6 = K1_seq_addr[3] & (H1_ram[10] # K1_seq_addr[1]) # !K1_seq_addr[3] & (!K1_seq_addr[1] & H1_ram[8]);
--H1_ram[2] is RAM_MN_dual2:inst6|ram[2] at LCFF_X29_Y31_N21
H1_ram[2] = DFFEAS(H1L18, GLOBAL(A1L3), , , , , , , );
--H1L7 is RAM_MN_dual2:inst6|Mux~61 at LCCOMB_X28_Y30_N12
H1L7 = K1_seq_addr[1] & (H1L6 & H1_ram[2] # !H1L6 & (H1_ram[0])) # !K1_seq_addr[1] & (H1L6);
--H1L8 is RAM_MN_dual2:inst6|Mux~62 at LCCOMB_X28_Y30_N8
H1L8 = C1_series_addr[0] & (K1_seq_addr[2]) # !C1_series_addr[0] & (K1_seq_addr[2] & H1L5 # !K1_seq_addr[2] & (H1L7));
--H1_ram[15] is RAM_MN_dual2:inst6|ram[15] at LCFF_X29_Y31_N23
H1_ram[15] = DFFEAS(H1L44, GLOBAL(A1L3), , , , , , , );
--H1_ram[5] is RAM_MN_dual2:inst6|ram[5] at LCFF_X29_Y30_N13
H1_ram[5] = DFFEAS(H1L24, GLOBAL(A1L3), , , , , , , );
--H1_ram[13] is RAM_MN_dual2:inst6|ram[13] at LCFF_X29_Y31_N13
H1_ram[13] = DFFEAS(H1L40, GLOBAL(A1L3), , , , , , , );
--H1L9 is RAM_MN_dual2:inst6|Mux~63 at LCCOMB_X28_Y30_N26
H1L9 = K1_seq_addr[1] & (H1_ram[5] # K1_seq_addr[3]) # !K1_seq_addr[1] & (!K1_seq_addr[3] & H1_ram[13]);
--H1_ram[7] is RAM_MN_dual2:inst6|ram[7] at LCFF_X29_Y30_N31
H1_ram[7] = DFFEAS(H1L28, GLOBAL(A1L3), , , , , , , );
--H1L10 is RAM_MN_dual2:inst6|Mux~64 at LCCOMB_X28_Y30_N2
H1L10 = H1L9 & (H1_ram[7] # !K1_seq_addr[3]) # !H1L9 & H1_ram[15] & K1_seq_addr[3];
--H1L11 is RAM_MN_dual2:inst6|Mux~65 at LCCOMB_X28_Y30_N0
H1L11 = C1_series_addr[0] & (H1L8 & (H1L10) # !H1L8 & H1L3) # !C1_series_addr[0] & (H1L8);
--L1_ram[4] is jie_RAM_MN_dual2:inst10|ram[4] at LCFF_X24_Y31_N19
L1_ram[4] = DFFEAS(L1L38, GLOBAL(A1L3), , , , , , , );
--L1_ram[2] is jie_RAM_MN_dual2:inst10|ram[2] at LCFF_X24_Y31_N31
L1_ram[2] = DFFEAS(L1L34, GLOBAL(A1L3), , , , , , , );
--L1_ram[0] is jie_RAM_MN_dual2:inst10|ram[0] at LCFF_X27_Y31_N29
L1_ram[0] = DFFEAS(L1L30, GLOBAL(A1L3), , , , , , , );
--L1L18 is jie_RAM_MN_dual2:inst10|Mux~56 at LCCOMB_X25_Y31_N8
L1L18 = K1_seq_addr[2] & K1_seq_addr[1] # !K1_seq_addr[2] & (K1_seq_addr[1] & L1_ram[2] # !K1_seq_addr[1] & (L1_ram[0]));
--L1_ram[6] is jie_RAM_MN_dual2:inst10|ram[6] at LCFF_X24_Y31_N3
L1_ram[6] = DFFEAS(L1L42, GLOBAL(A1L3), , , , , , , );
--L1L19 is jie_RAM_MN_dual2:inst10|Mux~57 at LCCOMB_X25_Y31_N0
L1L19 = K1_seq_addr[2] & (L1L18 & (L1_ram[6]) # !L1L18 & L1_ram[4]) # !K1_seq_addr[2] & (L1L18);
--L1_ram[13] is jie_RAM_MN_dual2:inst10|ram[13] at LCFF_X24_Y31_N27
L1_ram[13] = DFFEAS(L1L56, GLOBAL(A1L3), , , , , , , );
--L1_ram[11] is jie_RAM_MN_dual2:inst10|ram[11] at LCFF_X24_Y31_N7
L1_ram[11] = DFFEAS(L1L52, GLOBAL(A1L3), , , , , , , );
--L1_ram[9] is jie_RAM_MN_dual2:inst10|ram[9] at LCFF_X24_Y31_N29
L1_ram[9] = DFFEAS(L1L48, GLOBAL(A1L3), , , , , , , );
--L1L20 is jie_RAM_MN_dual2:inst10|Mux~58 at LCCOMB_X25_Y31_N24
L1L20 = K1_seq_addr[2] & K1_seq_addr[1] # !K1_seq_addr[2] & (K1_seq_addr[1] & L1_ram[11] # !K1_seq_addr[1] & (L1_ram[9]));
--L1_ram[15] is jie_RAM_MN_dual2:inst10|ram[15] at LCFF_X24_Y31_N15
L1_ram[15] = DFFEAS(L1L60, GLOBAL(A1L3), , , , , , , );
--L1L21 is jie_RAM_MN_dual2:inst10|Mux~59 at LCCOMB_X25_Y31_N6
L1L21 = K1_seq_addr[2] & (L1L20 & (L1_ram[15]) # !L1L20 & L1_ram[13]) # !K1_seq_addr[2] & (L1L20);
--L1_ram[5] is jie_RAM_MN_dual2:inst10|ram[5] at LCFF_X27_Y30_N3
L1_ram[5] = DFFEAS(L1L40, GLOBAL(A1L3), , , , , , , );
--L1_ram[3] is jie_RAM_MN_dual2:inst10|ram[3] at LCFF_X27_Y30_N1
L1_ram[3] = DFFEAS(L1L36, GLOBAL(A1L3), , , , , , , );
--L1_ram[1] is jie_RAM_MN_dual2:inst10|ram[1] at LCFF_X24_Y31_N13
L1_ram[1] = DFFEAS(L1L32, GLOBAL(A1L3), , , , , , , );
--L1L22 is jie_RAM_MN_dual2:inst10|Mux~60 at LCCOMB_X27_Y31_N14
L1L22 = K1_seq_addr[1] & (K1_seq_addr[2] # L1_ram[3]) # !K1_seq_addr[1] & L1_ram[1] & !K1_seq_addr[2];
--L1_ram[7] is jie_RAM_MN_dual2:inst10|ram[7] at LCFF_X27_Y30_N7
L1_ram[7] = DFFEAS(L1L44, GLOBAL(A1L3), , , , , , , );
--L1L23 is jie_RAM_MN_dual2:inst10|Mux~61 at LCCOMB_X28_Y31_N26
L1L23 = K1_seq_addr[2] & (L1L22 & (L1_ram[7]) # !L1L22 & L1_ram[5]) # !K1_seq_addr[2] & (L1L22);
--L1L24 is jie_RAM_MN_dual2:inst10|Mux~62 at LCCOMB_X25_Y31_N12
L1L24 = K1_seq_addr[3] & (C1_series_addr[0] # L1L21) # !K1_seq_addr[3] & L1L23 & !C1_series_addr[0];
--L1_ram[12] is jie_RAM_MN_dual2:inst10|ram[12] at LCFF_X27_Y30_N13
L1_ram[12] = DFFEAS(L1L54, GLOBAL(A1L3), , , , , , , );
--L1_ram[10] is jie_RAM_MN_dual2:inst10|ram[10] at LCFF_X27_Y30_N9
L1_ram[10] = DFFEAS(L1L50, GLOBAL(A1L3), , , , , , , );
--L1_ram[8] is jie_RAM_MN_dual2:inst10|ram[8] at LCFF_X27_Y30_N29
L1_ram[8] = DFFEAS(L1L46, GLOBAL(A1L3), , , , , , , );
--L1L25 is jie_RAM_MN_dual2:inst10|Mux~63 at LCCOMB_X25_Y31_N26
L1L25 = K1_seq_addr[2] & K1_seq_addr[1] # !K1_seq_addr[2] & (K1_seq_addr[1] & L1_ram[10] # !K1_seq_addr[1] & (L1_ram[8]));
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