jiaozhijiejiaozhi.hif

一个简单的交织实现程序

b3d07c643dae10ab2b3e646e99ec45fc
d:|program files|altera|quartus60|libraries|megafunctions|altsyncram.inc
2d485e3cf75d4048974bdbf0d920cb89
d:|program files|altera|quartus60|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
d:|program files|altera|quartus60|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
d:|program files|altera|quartus60|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
d:|program files|altera|quartus60|libraries|megafunctions|altdpram.inc
4e1931f9814db9f22f22b9eb377c65d6
d:|program files|altera|quartus60|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# end
# entity
altsyncram_rmi1
# storage
db|jiaozhijiejiaozhi.(13).cnf
db|jiaozhijiejiaozhi.(13).cnf
# case_insensitive
# source_file
db|altsyncram_rmi1.tdf
c33ef8ad3f919bf01d70b58f905a3f6a
6
# user_parameter {
PORT_A_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
}
# used_port {
wren_a
-1
3
q_b0
-1
3
data_a0
-1
3
clock0
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
none
0
}
# end
# entity
cobination
# storage
db|jiaozhijiejiaozhi.(7).cnf
db|jiaozhijiejiaozhi.(7).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
cobination.v
7cbc2b2fd337b6a7a616486de426d927
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
jieinterlace:inst1|cobination:inst12
interlace:inst|cobination:inst3
}
# end
# entity
counter
# storage
db|jiaozhijiejiaozhi.(3).cnf
db|jiaozhijiejiaozhi.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
counter.v
3cd59bb735c5e42daf5c1d4513aa81
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
NN
30
PARAMETER_UNKNOWN
USR
}
# end
# entity
counter1
# storage
db|jiaozhijiejiaozhi.(14).cnf
db|jiaozhijiejiaozhi.(14).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
counter1.v
53622cfcae711e94bc22c348d7fa13
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
NN
30
PARAMETER_UNKNOWN
USR
}
# hierarchies {
interlace:inst|counter1:inst5
}
# end
# entity
RAM_MN_dual
# storage
db|jiaozhijiejiaozhi.(2).cnf
db|jiaozhijiejiaozhi.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
RAM_MN_dual.vhd
2bc5e6cd233e8a499871c4ac4316f8e
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
jieinterlace:inst1|RAM_MN_dual:inst5
interlace:inst|RAM_MN_dual:inst2
}
# end
# entity
RAM_MN_dual2
# storage
db|jiaozhijiejiaozhi.(6).cnf
db|jiaozhijiejiaozhi.(6).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
RAM_MN_dual2.vhd
1bf353a8275569caa9be916f48d45ac
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
jieinterlace:inst1|RAM_MN_dual2:inst6
interlace:inst|RAM_MN_dual2:inst6
}
# end
# entity
altsyncram
# storage
db|jiaozhijiejiaozhi.(15).cnf
db|jiaozhijiejiaozhi.(15).cnf
# case_insensitive
# source_file
d:|program files|altera|quartus60|libraries|megafunctions|altsyncram.tdf
c9a54fc8e33741c15b27e3d74d615aff
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
DUAL_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
1
PARAMETER_UNKNOWN
USR
WIDTHAD_A
5
PARAMETER_UNKNOWN
USR
NUMWORDS_A
32
PARAMETER_UNKNOWN
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
USR
WIDTHAD_B
5
PARAMETER_UNKNOWN
USR
NUMWORDS_B
32
PARAMETER_UNKNOWN
USR
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
USR
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
USR
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
INIT_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Stratix II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_1qe1
PARAMETER_UNKNOWN
USR
}
# used_port {
wren_a
-1
3
q_b0
-1
3
data_a0
-1
3
clock1
-1
3
clock0
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
d:|program files|altera|quartus60|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
d:|program files|altera|quartus60|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
d:|program files|altera|quartus60|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
d:|program files|altera|quartus60|libraries|megafunctions|aglobal60.inc
b3d07c643dae10ab2b3e646e99ec45fc
d:|program files|altera|quartus60|libraries|megafunctions|altsyncram.inc
2d485e3cf75d4048974bdbf0d920cb89
d:|program files|altera|quartus60|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
d:|program files|altera|quartus60|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
d:|program files|altera|quartus60|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
d:|program files|altera|quartus60|libraries|megafunctions|altdpram.inc
4e1931f9814db9f22f22b9eb377c65d6
d:|program files|altera|quartus60|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# end
# entity
altsyncram_1qe1
# storage
db|jiaozhijiejiaozhi.(16).cnf
db|jiaozhijiejiaozhi.(16).cnf
# case_insensitive
# source_file
db|altsyncram_1qe1.tdf
86ad864298d5ff6d765871a65386fc5
6
# user_parameter {
PORT_A_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
}
# used_port {
wren_a
-1
3
q_b0
-1
3
data_a0
-1
3
clock1
-1
3
clock0
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
none
0
}
# end
# entity
jieinterlace
# storage
db|jiaozhijiejiaozhi.(1).cnf
db|jiaozhijiejiaozhi.(1).cnf
# case_insensitive
# source_file
jieinterlace.bdf
e8101f9e436f4e4050e610643d2e64
24
# hierarchies {
jieinterlace:inst1
}
# end
# entity
rom_mn_interlace
# storage
db|jiaozhijiejiaozhi.(4).cnf
db|jiaozhijiejiaozhi.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
rom_mn_interlace.vhd
208c49dbd44de938367168487f13b120
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
jieinterlace:inst1|rom_mn_interlace:inst
interlace:inst|rom_mn_interlace:inst
}
# end
# entity
interlace
# storage
db|jiaozhijiejiaozhi.(8).cnf
db|jiaozhijiejiaozhi.(8).cnf
# case_insensitive
# source_file
interlace.bdf
6df0893b94698dc01555985c212a8e6a
24
# hierarchies {
interlace:inst
}
# end
# entity
counter2
# storage
db|jiaozhijiejiaozhi.(17).cnf
db|jiaozhijiejiaozhi.(17).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
counter2.vhd
6a64cfaa9d1fa39758c7d0b1251cf8ab
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
jieinterlace:inst1|counter2:inst1
}
# end
# entity
jiaozhijiejiaozhi
# storage
db|jiaozhijiejiaozhi.(0).cnf
db|jiaozhijiejiaozhi.(0).cnf
# case_insensitive
# source_file
jiaozhijiejiaozhi.bdf
7777a51fd4ea26a5584776213ddba77f
24
# hierarchies {
|
}
# end
# complete