wave.vhd

设计一个液晶显示驱动电路

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY WAVE IS
PORT(CLK,BUSY:IN STD_LOGIC;
     OUTDATA:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
     REQ:OUT STD_LOGIC);
END WAVE;
ARCHITECTURE ONE OF WAVE IS
SIGNAL S1,S2:STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL S:STD_LOGIC_VECTOR(23 DOWNTO 0);
SIGNAL COUNT,N:STD_LOGIC_VECTOR(2 DOWNTO 0);
SIGNAL TEMP,TEMP1,GATECLOCK,SEL:STD_LOGIC;
SIGNAL NN:STD_LOGIC;
BEGIN 
LAN0:PROCESS(GATECLOCK) 
BEGIN
IF RISING_EDGE(GATECLOCK) THEN
     IF COUNT="110"THEN
        COUNT<="000";
     ELSE
        COUNT<=COUNT+1;
     END IF;
  END IF;
END PROCESS LAN0;
LAN1:PROCESS(CLK)
BEGIN
IF RISING_EDGE(CLK)THEN
  IF BUSY='0' THEN
   CASE COUNT IS
   WHEN "000"=>OUTDATA<=X"F2";TEMP<='0';
   WHEN "001"=>OUTDATA<=S1;
   WHEN "010"=>OUTDATA<=S2;TEMP<='1';
   WHEN "011"=>OUTDATA<=X"F1";TEMP1<='0';
   WHEN "100"=>OUTDATA<=S(23 DOWNTO 16);
   WHEN "101"=>OUTDATA<=S(15 DOWNTO 8);
   WHEN "110"=>OUTDATA<=S(7 DOWNTO 0);TEMP1<='1';
   WHEN OTHERS=>NULL;
   END CASE;
GATECLOCK<='1';
REQ<='1';
ELSE
GATECLOCK<='0';
REQ<='0';
END IF;
END IF;
END PROCESS LAN1;
LAN2:PROCESS(TEMP)
BEGIN
IF TEMP'EVENT AND TEMP='0'THEN
    IF S1=X"7F"THEN S1<=X"00";
    ELSE
    S1<=S1+1;
    END IF;
END IF;
END PROCESS LAN2;
LAN3:PROCESS(TEMP)
BEGIN
IF TEMP'EVENT AND TEMP='0'THEN
   IF SEL='1'THEN
      IF S2=X"1F"THEN SEL<='0';
      ELSE
         S2<=S2+1;
      END IF;
    ELSE
       IF S2=X"00"THEN SEL<='1';
       ELSE
          S2<=S2-1;
       END IF;
     END IF;
END IF;
END PROCESS LAN3;
LAN4:PROCESS(TEMP1)
BEGIN
IF TEMP1'EVENT AND TEMP1='0' THEN
IF N="101"THEN N<="000";
ELSE
   N<=N+1;
END IF;
   CASE N IS
   WHEN "000"=>S<=X"050174";
   WHEN "001"=>S<=X"06013D";
   WHEN "010"=>S<=X"070133";
   WHEN "011"=>S<=X"080130";
   WHEN "100"=>S<=X"09016D";
   WHEN "101"=>S<=X"0A0173";
   WHEN OTHERS=>NULL;
   END CASE;
END IF;
END PROCESS LAN4;
END ONE;