ad7710.c

CAN__组建现场总线系统设计技术(光盘)

/*
 * ad7710.c
 *
 * AD数据采集
 *
 * 
 *
 *
 *						陈真勇(SA01010010)
 *						[e-mail] or
 *						[e-mail]
 *						中国科学技术大学自动化系
 *						2002/6/12
 */

#include "link.h"
#include "type.h"
#include "delay.h"
#include "watchdog.h"
#include <intrins.h>
#include "ad7710.h"

/* external-clocking mode. clock in frequency is 10MHz */
/* note: 在写完控制字后，程序将等待DRDY变低。
如果此时出现故障导致DRDY无法变
低，则看门狗也救不了。*/


BYTE ctrl_byte[3];/*存放控制字，局部变量*/
UINT data_word;/*存放数据，局部变量*/

UINT read_ad()
{
	BYTE i;
	UINT mask=0x8000;
	data_word=0;
	/* wait drdy low */
	while(ADDRDY){;}

	EA = 0;

	/* make A0 high */
	ADA0=1;

	/* wait t22. at least 0.2 us */
	_nop_();
	/* bring rfs low */
	ADRFS=0;

	/* make 16 falling_edge of sclk and read 16 bits data from sdata */
	for(i=0;i<16;i++){
		ADSCLK=0;
		if(ADSDATA){
			data_word |= mask;
		}
		ADSCLK=1;
		mask >>= 1;
	}
	/* make rfs high */
	ADRFS=1;
	ADA0=1;

	EA = 1;
	
	return data_word;
}
/* both p1 and p2 only use bit11 to bit0 */
void write_ctrl_reg() using 0
{
	BYTE i,j,mask;

	EA = 0;

	ADRFS=1;	/* disable RFS */
	/* be sure that sclk is low */
	ADSCLK=1;

	/* make A0 low */
	ADA0=0;
	/* wait t32 . 0 at least*/
	_nop_();
	/* make tfs low */
	ADTFS=0;

	for(i=0;i<3;i++){
		mask=0x80;
		for(j=0;j<8;j++){
			/* send a bit to sdata */
			ADSDATA=(ctrl_byte[i]&mask)?1:0;

			ADSCLK=0;
			/* make sclk high for t26 */
			mask >>= 1;	
			/* make sclk low for t27 */
			ADSCLK=1;

		}
	}
	
	/* wait t34 */
	
	/* make tfs high */
	ADTFS=1;

	EA = 1;

	/* wait until DRDY to be low */
	do{
		delay(50);
		clear_watchdog();
	}while(ADDRDY);
}

/* whenever there is a change in the ambient operating temperature or
supply voltage, a calibration routine should be initiated. it should also 
be initiated if there is a change in the selected gain,filter notch or
bipolar/unipolar input range. */
/* control register
	MD2 MD1 MD0 G2   G1 G0 CH PD   WL IO BO B/U
	0   0   1   #    #  #  #  0    0  0  0  #
	FS11 .............................. FS0
	0                                     0
*/
/* set channel gain
 * ch is 0 or 1
 * gain is 0~7,stand for 2^gain
 */
void set_mode(BYTE ch,struct ad7710_ch *param)
{
	ctrl_byte[0]=(param->cal_mode<<5) + (param->scale<<2) + (ch?2:0);
	ctrl_byte[1]=(param->unipolar?0x10:0x00) + param->hi_cutoff;
	ctrl_byte[2]=param->low_cutoff;		/* changed by zychen */

	write_ctrl_reg();
}

void init_7710(struct ad7710_ch *ch0,struct ad7710_ch *ch1)
{
	/* 校正 */
	set_mode(0,ch0);
	set_mode(1,ch1);

	/* 转入正常工作状态 */
	ch0->cal_mode = 0;/*normal mode*/
	ch1->cal_mode = 0;

	set_mode(0,ch0);
	set_mode(1,ch1);
}