📄 syslib.c
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if (*pLine == EOS) /* skip field if just CR */ continue; if (sscanf (pLine, "%x%1s", &value, &excess) != 1) { return ERROR; } storage[i] = (UINT8)value; /* assign new value */ pInline += 2; if(*pInline == ':') pInline++; } return OK; }/***************************************************************************** * ixdp425IfZero - Zero the MAC and IP address storage areas * * This routine permits the zeroing of all ethernet MAC addresses along * with the specification of the IP address to be associated with a * given interface. * * RETURNS: N/A * */void ixdp425IfZero(void) { UINT8 nvImage[(IXP425_EEPROM_SIZE/2)+1]; bzero(nvImage, sizeof(nvImage)); if ( sysNvRamSet(nvImage,(IXP425_EEPROM_SIZE/2),NV_RAM_IF_START_OFFSET) == ERROR) { puts("Error writing interface data to non-volatile storage"); } }/***************************************************************************** * ixdp425IfConfig - configure MAC and IP addresses of all ethernet interfaces * * This routine permits the programming of all ethernet MAC addresses along * with the specification of the IP address to be associated with a * given interface. * * RETURNS: OK or ERROR * */STATUS ixdp425IfConfig(void) { UINT32 i; UINT32 changed = 0; UINT8 nvImage[NV_RAM_IF_SIZE+1]; UINT32 index; char *colon;#if defined(INCLUDE_IXETHACCEND) UINT8 macAddr[IX_ETH_ACC_NUMBER_OF_PORTS][SIZE_OF_MAC_ADDRESS+1]; UINT8 inetAddr[IX_ETH_ACC_NUMBER_OF_PORTS][SIZE_OF_IP_ADDRESS+1];#endif /* INCLUDE_IXETHACCEND */#if defined(INCLUDE_PCI) && defined(INCLUDE_FEI82557END) && defined(IXDP_FEIEND_USE_NVRAM_IP) UINT8 inetAddrPci[IXP425_MAX_FEI_DEVS][SIZE_OF_IP_ADDRESS+1];#endif /* INCLUDE_PCI && INCLUDE_FEI82557END && IXDP_FEIEND_USE_NVRAM_IP */ UINT8 line[256]; sysNvRamGet(nvImage, NV_RAM_IF_SIZE, NV_RAM_IF_START_OFFSET);#if defined(INCLUDE_IXETHACCEND) bzero((char *)inetAddr, sizeof(inetAddr)); bzero((char *)macAddr, sizeof(macAddr));#endif /* INCLUDE_IXETHACCEND */#if defined(INCLUDE_PCI) && defined(INCLUDE_FEI82557END) && defined(IXDP_FEIEND_USE_NVRAM_IP) bzero((char *)inetAddrPci, sizeof(inetAddrPci));#endif /* INCLUDE_PCI && INCLUDE_FEI82557END && IXDP_FEIEND_USE_NVRAM_IP */#if defined(INCLUDE_IXETHACCEND) /* Transfer to individual arrays */ for (i=0;i<IX_ETH_ACC_NUMBER_OF_PORTS; i++) { /* Get MAC address */ index = (NV_MAC_ADRS_NPE1 + i*SIZE_OF_MAC_ADDRESS) - NV_RAM_IF_START_OFFSET; memcpy(macAddr[i], &nvImage[index],SIZE_OF_MAC_ADDRESS); /* Get IP address */ index = NV_IP_ADRS_NPE1 + i*SIZE_OF_IP_ADDRESS - NV_RAM_IF_START_OFFSET; memcpy(inetAddr[i], &nvImage[index],SIZE_OF_IP_ADDRESS); inetAddr[i][SIZE_OF_IP_ADDRESS]=0; }#endif /* INCLUDE_IXETHACCEND */#if defined(INCLUDE_PCI) && defined(INCLUDE_FEI82557END) && defined(IXDP_FEIEND_USE_NVRAM_IP) /*PCI END IP addresses*/ for (i=0;i<IXP425_MAX_FEI_DEVS;i++) { index = NV_IP_ADRS_PCIEND1 + i*SIZE_OF_IP_ADDRESS - NV_RAM_IF_START_OFFSET; memcpy(inetAddrPci[i], &nvImage[index],SIZE_OF_IP_ADDRESS); inetAddrPci[i][SIZE_OF_IP_ADDRESS]=0; }#endif /* INCLUDE_PCI && INCLUDE_FEI82557END && IXDP_FEIEND_USE_NVRAM_IP */ while(TRUE) { printf("\n"); /* Display the values */#if defined(INCLUDE_IXETHACCEND) for (i=0;i<IX_ETH_ACC_NUMBER_OF_PORTS; i++) { printf("ixe%d MAC address: %02x:%02x:%02x:%02x:%02x:%02x \n",i, macAddr[i][0], macAddr[i][1], macAddr[i][2], macAddr[i][3], macAddr[i][4], macAddr[i][5]); } printf("\n"); for (i=0;i<IX_ETH_ACC_NUMBER_OF_PORTS; i++) { printf("ixe%d IP address: %s \n",i,inetAddr[i]); }#endif /* INCLUDE_IXETHACCEND */#if defined(INCLUDE_PCI) && defined(INCLUDE_FEI82557END) && defined(IXDP_FEIEND_USE_NVRAM_IP) printf("\n"); for (i=0;i<IXP425_MAX_FEI_DEVS;i++) { printf("fei%d IP address: %s\n",i,inetAddrPci[i]); }#endif /* INCLUDE_PCI && INCLUDE_FEI82557END && IXDP_FEIEND_USE_NVRAM_IP */ printf("\nAny Changes (y/n)> "); fioRdString (STD_IN, line, MAX_LINE); if (line[0] != 'y') break;#if defined(INCLUDE_IXETHACCEND) printf("\nChange a MAC address (y/n)> "); fioRdString (STD_IN, line, MAX_LINE); if (line[0] == 'y') { /*NPE MACs next*/ for (i=0;i<IX_ETH_ACC_NUMBER_OF_PORTS; ) { printf("ixe%d MAC address: %02x:%02x:%02x:%02x:%02x:%02x ",i, macAddr[i][0], macAddr[i][1], macAddr[i][2], macAddr[i][3], macAddr[i][4], macAddr[i][5]); fioRdString (STD_IN, line, MAX_LINE); if (line[0] == '-') { if (i > 0) i--; continue; } if (line[0] != 0 ) { if (modMac(macAddr[i], line)==OK) { index = (NV_MAC_ADRS_NPE1 + i*SIZE_OF_MAC_ADDRESS) - NV_RAM_IF_START_OFFSET; memcpy(&nvImage[index], macAddr[i], 6); changed++; } else { printf("Invalid entry, changes discarded\n"); continue; } } i++; } } printf("\nChange ixe IP address (y/n)> "); fioRdString (STD_IN, line, MAX_LINE); if (line[0] == 'y') { /*NPE IP addresses*/ for (i=0;i<IX_ETH_ACC_NUMBER_OF_PORTS;) { printf("ixe%d IP address: %s ",i,inetAddr[i]); fioRdString (STD_IN, line, MAX_LINE); if (line[0] == '-') { if (i > 0) i--; continue; } if (line[0] != 0 ) { bzero(inetAddr[i], SIZE_OF_IP_ADDRESS); /* Do not save "0x" in the mask */ colon = strchr(line, ':'); if ( colon ) { colon++; if(strncmp("0x",colon, 2) == 0) sprintf(colon, "%s", colon+2); } memcpy(inetAddr[i],line, strlen(line)); changed++; } i++; } }#endif /* INCLUDE_IXETHACCEND */#if defined(INCLUDE_PCI) && defined(INCLUDE_FEI82557END) && defined(IXDP_FEIEND_USE_NVRAM_IP) printf("\nChange fei IP address (y/n)> "); fioRdString (STD_IN, line, MAX_LINE); if (line[0] == 'y') { /*PCI END IP addresses*/ for (i=0;i<IXP425_MAX_FEI_DEVS;) { printf("fei%d IP address: %s ",i,inetAddrPci[i]); fioRdString (STD_IN, line, MAX_LINE); if (line[0] == '-') { if (i > 0) i--; continue; } if (line[0] != 0 ) { bzero(inetAddrPci[i], SIZE_OF_IP_ADDRESS); /* Do not save "0x" in the mask */ colon = strchr(line, ':'); if ( colon ) { colon++; if(strncmp("0x",colon, 2) == 0) sprintf(colon, "%s", colon+2); } memcpy(inetAddrPci[i],line, strlen(line)); changed++; } i++; } }#endif /* INCLUDE_PCI && INCLUDE_FEI82557END && IXDP_FEIEND_USE_NVRAM_IP */ } if( changed != 0 ) { printf("\nWriting interface data to non-volatile storage...\n");#if defined(INCLUDE_IXETHACCEND) /* Move data back to serial array */ for (i=0;i<IX_ETH_ACC_NUMBER_OF_PORTS; i++) { /* Get MAC address */ index = (NV_MAC_ADRS_NPE1 + i*SIZE_OF_MAC_ADDRESS) - NV_RAM_IF_START_OFFSET; memcpy(&nvImage[index], macAddr[i],SIZE_OF_MAC_ADDRESS); /* Get IP address */ index = NV_IP_ADRS_NPE1 + i*SIZE_OF_IP_ADDRESS - NV_RAM_IF_START_OFFSET; memcpy(&nvImage[index], inetAddr[i],SIZE_OF_IP_ADDRESS); }#endif /* INCLUDE_IXETHACCEND */#if defined(INCLUDE_PCI) && defined(INCLUDE_FEI82557END) && defined(IXDP_FEIEND_USE_NVRAM_IP) /*PCI END IP addresses*/ for (i=0;i<IXP425_MAX_FEI_DEVS;i++) { index = NV_IP_ADRS_PCIEND1 + i*SIZE_OF_IP_ADDRESS - NV_RAM_IF_START_OFFSET; memcpy(&nvImage[index], inetAddrPci[i], SIZE_OF_IP_ADDRESS); }#endif /* INCLUDE_PCI && INCLUDE_FEI82557END && IXDP_FEIEND_USE_NVRAM_IP */ if ( sysNvRamSet(nvImage,NV_RAM_IF_SIZE,NV_RAM_IF_START_OFFSET) == ERROR) { puts("Error writing interface data to non-volatile storage"); return ERROR; } printf("New configuration written, changes will take effect after a reboot\n"); } return OK; }/***************************************************************************** * sysMicroDelay - Microsecond delay * * RETURNS: N/A * */void sysMicroDelay(int microseconds) { volatile UINT32 delay = 0; volatile UINT32 delta; UINT32 lastTimestamp = *((volatile int *)IXP425_OSTS); UINT32 currentTimestamp; while (delay < (microseconds * IXP425_PERIPHERAL_BUS_CLOCK)) { currentTimestamp = *((volatile int *)IXP425_OSTS); delta = currentTimestamp > lastTimestamp ? currentTimestamp - lastTimestamp : 0xffffffff - lastTimestamp + currentTimestamp; delay += delta; lastTimestamp = currentTimestamp; } }#ifdef INCLUDE_IXP425_UART_DEBUGvoid serialLog (char *pMsg, UINT32 nValue);void serialStringOut (char *pMsg);void serialMemDump (UINT32 *addr, UINT32 size);void serialHexOut (UINT32 value);void serialHexDig (UINT8 value);void serialTx (UINT8 value); #define UART_LineStatus 5 #define UART_Transmit 0 #define UARTLSR_TXHoldingEmpty (1 << 5)void serialLog (char *pMsg, UINT32 nValue) { serialStringOut (pMsg); serialHexOut (nValue); serialStringOut ("\r\n"); }void serialStringOut (char *pMsg) { while (*pMsg) serialTx (*pMsg++); }void serialMemDump (UINT32 *addr, UINT32 size) { while (size) { serialHexOut((UINT32)addr); serialTx (':'); serialHexOut (*addr++); serialTx (13); serialTx (10); size -= 4; } }void serialHexOut (UINT32 value) { UINT8 dig, ch; UINT8 count = 28; UINT32 temp; for (dig = 0 ; dig < 8; dig++) { temp = (value >> count); temp = temp & 0x0000000f; ch = (UINT8)temp; serialHexDig (ch); count -= 4; } }void serialHexDig (UINT8 value) { UINT8 hex; hex = (value < 10) ? (value + 0x30) : (value + 55); serialTx (hex); }void serialTx (UINT8 value) { volatile UINT8 status = 0; while (status == 0) status = *(UINT32*)(IXP425_UART2_BASE + UART_LineStatus); *(UINT8*)(IXP425_UART2_BASE + UART_Transmit) = value; }#endif#ifdef INCLUDE_MMU_VIRTUAL_MEM_EQUAL_PHY_MEMvoid *mmuPhysToVirt(void *physicalAddress) { return(physicalAddress); }void *mmuVirtToPhys(void *virtualAddress) { return(virtualAddress); }#endif#ifdef ROM_ENABLES_MMU/* This function is used to copy the ROM version of the translation table * into RAM, set the p-bit for MMU table walks, and change the TTB register * to point to this new location. There is no need to invalidate the TLB as * only the location of the translation table is being changed, not the * contents. => the TLB is still valid. * N.B. It is intended that this function is _only_ executed from the bootrom */PRIVATE void sysRomTTableToRamTransition(void) { UINT32 originalTTB; UINT32 *memSwap; DEBUG_OUT_VAL(INFO_CODE_B1); if(!sysExecutingFromBootrom) { assert (0); while (1) { DEBUG_OUT_VAL(INFO_CODE_BB); } } /* Get the base address of the Translation Table */ originalTTB = sysReadTTB(); DEBUG_OUT_VAL(INFO_CODE_B2); /* Copy the Translation Table to the RAM location and swap it */ DEBUG_OUT_VAL(INFO_CODE_B3); memcpy( ((char *)(&sysBootromTTableInRam)), ((char *)originalTTB), MMU_TABLE_SIZE ); memSwap = (UINT32 *)(&sysBootromTTableInRam); while (memSwap < (UINT32 *)(sysBootromTTableInRam + MMU_TABLE_SIZE)) { *memSwap = ntohl(*memSwap); memSwap++; } DEBUG_OUT_VAL(INFO_CODE_B4); /* Enable P-Bit for MMU Table walks */ sysEnablePBitForMmuTableWalk(); /* Update the TTB register to point to the new table in RAM */ DEBUG_OUT_VAL(INFO_CODE_B5); sysWriteTTB((UINT32)(&sysBootromTTableInRam)); }#endif /* ROM_ENABLES_MMU */
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