📄 syslib.c
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#endif /*INCLUDE_IXETHACCEND*/int sysFlags; /* boot flags */int sysProcNum = 0; /* processor number of this CPU *//* Area used to flush D-cache */UINT32 sysCacheFlushReadArea[D_CACHE_SIZE/sizeof(UINT32)];/* Area used to flush mini-cache */UINT32 sysMinicacheFlushReadArea[MINI_CACHE_SIZE/sizeof(UINT32)];char *sysExcMsg = EXC_MSG_ADRS; /* catastrophic message area *//* forward LOCAL function declarations *//* forward declarations */char * sysPhysMemTop (void);/*** Init Routines ***//******************************************************************************** sysHwInit0 - Intialize _func_armVirtToPhys before sysHwInit is called** This function initialises _func_armVirtToPhys and _func_armPhysToVirt* before sysHwInit is called. It is called from usrInit in bootConfig.c* before cacheLibInit is called.** RETURNS: N/A*/void sysHwInit0() {#ifdef LOCAL_MEM_AUTOSIZE int i;#endif DEBUG_OUT_INIT; DEBUG_OUT_VAL(INFO_CODE_10);#if defined(INCLUDE_CACHE_SUPPORT) || defined(INCLUDE_MMU) /* * Install the appropriate cache libary, using the our * address translation routines. */ cacheArmXSCALELibInstall(mmuPhysToVirt, mmuVirtToPhys);#endif DEBUG_OUT_VAL(INFO_CODE_11);#ifdef INCLUDE_MMU /* Install the appropriate MMU library and translation routines */ mmuArmXSCALELibInstall (mmuPhysToVirt, mmuVirtToPhys); /* Figure out if we are executing from the bootrom or the application * If the PC is greater than RAM_HIGH_ADRS we are in the bootrom bring up */ if ( sysReadProgramCounter() >= RAM_HIGH_ADRS) { sysExecutingFromBootrom = TRUE; } else { sysExecutingFromBootrom = FALSE; }#if (_BYTE_ORDER == _LITTLE_ENDIAN) if (!sysExecutingFromBootrom) { int acrValue; /* Set all SDRAM regions with P bit */ mmuArmXSCALEPBitSet((void *)IXP425_SDRAM_BASE, LOCAL_MEM_SIZE); #ifdef INCLUDE_PCI /* Set PCI regions with P bit */ mmuArmXSCALEPBitSet((void *)IXP425_PCI_BASE, IXP425_PCI_SP_SIZE);#endif /* INCLUDE_PCI */ /* Set Peripheral DC virtual regions with P bit */ mmuArmXSCALEPBitSet((void *)IXP425_PERIPHERAL_LE_DC_VIRT, IXP425_PERIPHERAL_SIZE); /* Set QMgr DC virtual regions with P bit */ mmuArmXSCALEPBitSet((void *)IXP425_QMGR_LE_DC_VIRT, IXP425_QMGR_SIZE); /* Set Expansion Config Register DC virtual regions with P bit */ mmuArmXSCALEPBitSet((void *)IXP425_EXP_CONFIG_LE_DC_VIRT, IXP425_EXP_CONFIG_SIZE); /* Set _all_ the Expansion bus DCvirtual regions with P bit. */ mmuArmXSCALEPBitSet((void *)IXP425_EXPANSION_BUS_BASE2_LE_DC_VIRT, IXP425_EXPANSION_BUS_TOTAL_SIZE); /* Make table walks use P bit */ acrValue = mmuArmXSCALEAcrGet(); acrValue |= 0x2; /* Set the P bit in the Auxiliary CR */ mmuArmXSCALEAcrSet( acrValue ); }#endif /* _BYTE_ORDER == _LITTLE_ENDIAN */#endif /* INCLUDE_MMU */ DEBUG_OUT_VAL(INFO_CODE_12);#ifdef LOCAL_MEM_AUTOSIZE for (i = 0; i < sysPhysMemDescNumEnt; i++) { if ((sysPhysMemDesc[i].virtualAddr == (void *) IXP425_SDRAM_BASE_ADRS) && (sysPhysMemDesc[i].physicalAddr == (void *) IXP425_SDRAM_BASE_ADRS)) { sysPhysMemDesc[i].len = sysPhysMemSize(); } }#endif DEBUG_OUT_VAL(INFO_CODE_13); }#if defined(INCLUDE_IXETHACCEND)/******************************************************************************* ixdp425 qmgr has to do nothing during the reboot process : a void callback is registered for all queues during the system shutdown : this will stop unexpected traffic from all components relying on qmgr */PRIVATE void qmgrVoidCallback(IxQMgrQId qId, IxQMgrCallbackId cbId){ /* do nothing */}PRIVATE void ixRebootHook(int rebootType){ extern BOOL ixNpeMhConfigNpeInterruptDisable(IxNpeMhNpeId npeId); IxQMgrQId qId; /* We dont want our dispatcher function running as we reboot */ ixpAuxClkDisconnect(); /* change the qmgr callbacks */ for (qId = IX_QMGR_QUEUE_0 ; qId <= IX_QMGR_QUEUE_63; qId++) { /* invalidate notifications and register a void callback for each queue */ ixQMgrNotificationCallbackSet(qId, qmgrVoidCallback, (IxQMgrCallbackId)0); } /* unregister npeMh interrupts */ ixNpeMhConfigNpeInterruptDisable (IX_NPEMH_NPEID_NPEA); ixNpeMhConfigNpeInterruptDisable (IX_NPEMH_NPEID_NPEB); ixNpeMhConfigNpeInterruptDisable (IX_NPEMH_NPEID_NPEC); /* halt all npe's (no more traffic) */ ixNpeDlNpeStopAndReset(IX_NPEDL_NPEID_NPEA); ixNpeDlNpeStopAndReset(IX_NPEDL_NPEID_NPEB); ixNpeDlNpeStopAndReset(IX_NPEDL_NPEID_NPEC); ixQMgrUnload();}#endif /*defined(INCLUDE_IXETHACCEND)*//********************************************************************************* sysHwInit - initialise the CPU board hardware** This routine initialises various features of the hardware.* Normally, it is called from usrInit() in usrConfig.c.** NOTE: This routine should not be called directly by the user.** RETURNS: N/A*/void sysHwInit (void) { DEBUG_OUT_VAL(INFO_CODE_14); /* Call back from the kernel for Interrupt stack setup */ _func_armIntStackSplit = sysIntStackSplit; /* disable all interrupt sources */ IXP425_MASK_ALL_INTERRUPTS(); /* Initialize EEPROM communication */ ixp425I2CStop (); /* Make sure Expansion Bus CS1 is set */ *((volatile unsigned long *) IXP425_EXP_CS1_REG) = IXDP425_CS1_DEFAULT; /* If booted with visionClick, the bootline may be bad */ if ( strncmp("fei",BOOT_LINE_ADRS, 3) && strncmp("ixe",BOOT_LINE_ADRS, 3)) { /* Not a valid bootline */ sysNvRamGet (BOOT_LINE_ADRS, BOOT_LINE_SIZE, 0); if ( strncmp("fei",BOOT_LINE_ADRS, 3) && strncmp("ixe",BOOT_LINE_ADRS, 3)) /* bootline in 'nvram' not correct either, override with config.h */ bcopy(DEFAULT_BOOT_LINE, BOOT_LINE_ADRS, strlen(DEFAULT_BOOT_LINE) + 1); } DEBUG_OUT_VAL(INFO_CODE_15); /* initialise the serial devices */ sysSerialHwInit (); DEBUG_OUT_VAL(INFO_CODE_16);#ifdef INCLUDE_PCI sysPciInit(); DEBUG_OUT_VAL(INFO_CODE_17); sysPciAssignAddrs();#endif DEBUG_OUT_VAL(INFO_CODE_18); sysEnableIRQMasks (); DEBUG_OUT_VAL(INFO_CODE_19);#ifdef ROM_ENABLES_MMU /* If we are executing from the bootrom then we need to move the bootrom's * translation table from ROM into RAM */ if (sysExecutingFromBootrom) { sysRomTTableToRamTransition(); } #endif /* ROM_ENABLES_MMU */ }/********************************************************************************* sysHwInit2 - additional system configuration and initialisation** This routine connects system interrupts and does any additional* configuration necessary.** RETURNS: N/A** NOMANUAL*/void sysHwInit2 (void) { DEBUG_OUT_VAL(INFO_CODE_20); /* Allocate vector table and init handlers */ intLibInit (IXP425_INT_NUM_LEVELS, IXP425_INT_NUM_LEVELS, IXP425_INT_MODE); DEBUG_OUT_VAL(INFO_CODE_21); /* initialise the interrupt controller */ ixp425IntDevInit (); DEBUG_OUT_VAL(INFO_CODE_22); /* connect serial interrupt */ sysSerialHwInit2 (); DEBUG_OUT_VAL(INFO_CODE_23);#ifdef INCLUDE_PCI /*connect the PCI interrupts*/ sysPciIntConnect(); DEBUG_OUT_VAL(INFO_CODE_24); /*Enable the PCI interrupt*/ sysPciIntEnable();#endif DEBUG_OUT_VAL(INFO_CODE_25);#if defined(INCLUDE_FEI82557END) /* map FEI Ethernet PCI device memory and I/O addresses */ sysLanPciInit ();#endif /* INCLUDE_FEI82557END */ DEBUG_OUT_VAL(INFO_CODE_26);#if defined(INCLUDE_IXETHACCEND)#if defined(IXETH_INIT_WITH_OTHER_FLAG) /* specify "ixe" as the "other" flag, to initialize it */ /* Eth Acc END driver */ { BOOT_PARAMS bootParams; bootStringToStruct(BOOT_LINE_ADRS, &bootParams); if(!strncmp(bootParams.bootDev, "ixe", 3) || !strncmp(bootParams.other, "ixe", 3)) { loadIxe = 1; ixdp425EthEndMuxInit(); } else { /* If other field was changed to no longer contain ixe, unload it */ ixRebootHook(0); } }#else /*IXETH_INIT_WITH_OTHER_FLAG*/ /* No need to add to "other" flag, just initialize it */ loadIxe = 1; ixdp425EthEndMuxInit();#endif /*IXETH_INIT_WITH_OTHER_FLAG*/#endif /* INCLUDE_IXETHACCEND */ DEBUG_OUT_VAL(INFO_CODE_27); }/****************************************************************************** * * ixdp425AppInit - final system configuration * * This routine is invoked after all other system initialisation has completed. * It configures and enables any Ethernet interfaces other than the boot device * and then invokes IXP425_APPL_INIT, which must be a valid C block. * */voidixdp425AppInit() {#if defined(INCLUDE_FEI82557END) && defined(IXDP_FEIEND_USE_NVRAM_IP) END_OBJ *pEnd; UINT32 fei557EndMask; UINT8 nvImage[NV_RAM_IF_SIZE+1]; UINT8 inetAddr[INET_ADDR_LEN]; UINT8 nameAndUnit[32]; UINT8 pNetDev[32]; UINT32 i=0; char *colon; int index,ipaddrOk; /*If there are fei devices that are not already attached, we should attach them here*/ /* Get a copy of the image from EEPROM/FLASH */ sysNvRamGet(nvImage, NV_RAM_IF_SIZE, NV_RAM_IF_START_OFFSET); for (i=0;i<IXP425_MAX_FEI_DEVS;i++) { sprintf(pNetDev,"%s","fei"); sprintf(nameAndUnit,"%s%d","fei",i); pEnd = endFindByName (pNetDev, i); if (pEnd == NULL) { continue; } /*need to figure out if this has been configured already*/ if (ifAddrGet(nameAndUnit,inetAddr)==ERROR) { if (ipAttach(i, pNetDev) != OK) { logMsg ("Failed to attach to device %s, unit: %d", (int)pNetDev, i, 0, 0, 0, 0); continue; } index = NV_IP_ADRS_PCIEND1 + i*SIZE_OF_IP_ADDRESS - NV_RAM_IF_START_OFFSET; memcpy(inetAddr, &nvImage[index],SIZE_OF_IP_ADDRESS); inetAddr[SIZE_OF_IP_ADDRESS]=0;#if defined(IXDP_FEI557_IP0_DEFAULT) && defined(IXDP_FEI557_IP1_DEFAULT) && defined(IXDP_FEI557_IP2_DEFAULT) && defined(IXDP_FEI557_IP3_DEFAULT)feiaddrRetry:#endif ipaddrOk = 1; /* See if there is a mask */ colon = strchr(inetAddr, ':'); if ( colon ) { *colon = 0; colon++; for(index = 0; index < 6; index++) { if( isxdigit(colon[index] == 0 ) ) { printf("ixdp425AppInit: Invalid Mask for fei%d IP: %s:%s Discarding Mask\n" ,i,inetAddr, colon); colon = NULL; break; } } if(colon != NULL) { sscanf(colon, "%x", &fei557EndMask); } } /* Check to see if its a valid IP address */ for(index = 0; index < SIZE_OF_IP_ADDRESS; ) { if ( !isdigit(inetAddr[index]) && inetAddr[index] != '.' ) {#if defined(IXDP_FEI557_IP0_DEFAULT) && defined(IXDP_FEI557_IP1_DEFAULT) && defined(IXDP_FEI557_IP2_DEFAULT) && defined(IXDP_FEI557_IP3_DEFAULT) printf("ixdp425AppInit: Forcing Hard Coded IP Address for fei%d\n",i); sprintf(inetAddr, "%s", defaultfeiInetAddr[i]); goto feiaddrRetry;#else ipaddrOk = 0; printf("ixdp425AppInit: Invalid Address for fei%d IP: %s Ignoring\n",i,inetAddr); break;#endif } if ( inetAddr[++index] == 0 ) break; } if ( ipaddrOk ) { ifAddrSet(nameAndUnit, inetAddr); if( colon != NULL ) { ifMaskSet(nameAndUnit, fei557EndMask); printf("ixdp425AppInit: fei%d: IP Addr set to %s:%x\n" ,i, inetAddr, fei557EndMask); } else { printf("ixdp425AppInit: fei%d: IP Addr set to %s\n",i, inetAddr); } } } }#endif#if defined(INCLUDE_IXETHACCEND) if ( loadIxe && ixdp425EthEndStartUp() != OK ) { ; }#endif /* INCLUDE_IXETHACCEND */#if defined(INCLUDE_IXETHACCEND) /* registers a hook to stop all traffic during reboot steps. this hook * will be running when the system is asked to reboot * Because it is set after the END drivers are initialized, the hook * will run after the end driver are stopped (This hook sequnce is * dependant on the system initialisation steps) * If no END drivers are initialised, this will anyway stop all traffic from * Ix components during SW reboot. */ rebootHookAdd((FUNCPTR)ixRebootHook);#endif /*defined(INCLUDE_IXETHACCEND)*/#ifdef INCLUDE_WINDVIEW wvNetInit(); wvNetLevelAdd(1); wvNetLevelAdd(2); wvNetLevelAdd(3); wvNetLevelAdd(4); wvNetLevelAdd(5); wvNetLevelAdd(6); wvNetLevelAdd(7); wvNetLevelAdd(8);#endif }/********************************************************************************* sysPhysMemTop - get the address of the top of physical memory** This routine returns the address of the first missing byte of memory,* which indicates the top of memory.** Normally, the user specifies the amount of physical memory with the* macro LOCAL_MEM_SIZE in config.h. BSPs that support run-time* memory sizing do so only if the macro LOCAL_MEM_AUTOSIZE is defined.* If not defined, then LOCAL_MEM_SIZE is assumed to be, and must be, the* true size of physical memory.*
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