target.nr

ixp425 bsp for vxworks

'\" t
.so wrs.an
.\" ixdp425/target.nr - target-specific documentation
.\"
.\" Copyright 2002 Wind River Systems, Inc.
.\"
.\" modification history
.\" --------------------
.\" 01a,13aug03,m_h  2233 Comments
.\" 01a,30jul03,m_h  pbit patch instructions
.\" 01a,24jul03,m_h  Access Library name change
.\" 01a,17jul03,m_h  NVRAM, POLL, auxClk
.\" 01a,02jul03,m_h  little endian
.\" 01a,04apr03,m_h  Spelling, auxClk support
.\" 01a,14nov02,jb3  SPR 84009
.\" 01a,29oct02,jb  Add note that polled mode is not supported
.\" 01a,25oct02,jb  Misc changes
.\" 01a,23oct02,jb  Updating to explicity document dependencies on
.\"                  access library library
.\" 01a,07oct02,jb  Adding to Flash burn instructions
.\" 01a,18sep02,jb  Adding instructions for setting MAC and IP addresses in
.\"                  eeprom
.\" 01a,15aug02,jb  Updating for Beta release
.\" 01a,30jul02,jb  Updating for Alpha release
.\" 01a,26jun02,jb  Fixing flash name
.\" 01d,25jun02,jb  Continue modification to ixdp425
.\" 01c,16Apr02,dh Initial version for the IXDP425 board
.\" 01b,21MAR02,dh added information relating to base board for IXP425
.\" 01a,12Oct01,pjb created, derived from integrator940t
.\"
.TH IXDP425 Reference T "Intel IXDP425" "Rev: 21 Mar 02" "TORNADO REFERENCE: VXWORKS"

.SH "NAME"
.aX "Intel IXDP425"

.SH "INTRODUCTION"
This manual entry provides board-specific information necessary to run
VxWorks for the IXDP425 BSP. The IXDP425 
BSP release requires an Intel BIXMB425AD-IXMB425 board. This is the only board
currently supported by the BSP. Before running VxWorks verify that the
board has been baselined and runs in the default configuration.
 
IXDP425 Specification:
.CS
Processor:		IXP425 with Intel XScale core.
			Running at ratios of x2, x3, and x4 the system clock
			rate of 133MHz.

Memory
  SDRAM:		133MHz SDRAM, 256 Mbytes total (2 Banks, 4 chips, 512Mbit)
  I2C EEPROM:		512 x 8-bit I2C EEPROM (software controlled)
  FLASH:		16 Mbytes Intel 16Mbyte StrataFlash

I/O
  Ethernet -2 ports:	LXT971A 10/100BaseT PHY connected to MII port
			LXT971A 10/100BaseT PHY connected to MII port
  Serial  -2 ports:	RS232, 115.2K (TX, RX, CTS, RTS) console UART
			RS232, 921.6K (TX, RX, CTS, RTS) 'fast' UART

GPIO:			16 GPIOs programmable as either inputs or outputs. 
			In addition, two GPIOs can be programmed to source 
			clocks suitable for running the PCI bus and Expansion 
			Bus. All GPIOs are capable of driving LEDs.

PCI:			Four 32-bit PCI slots supporting LAN or WAN PHYs

USB:			USB 1.1 Device Controller supporting full-speed
			(12 Mbit/s) data rate

Debug Support:		XScale JTAG ICE connector 

Other:			7-Segment Display
.CE

.SS "IXDP425 BSP DETAILS"
.SS Installation
By default this BSP does not support the on board network processing "engines".
This support requires the Intel Access library, libIxp425.a, be
installed.  For little endian support, SPR 89608 patch must also be
installed.

These are the steps to follow for proper installation:
    1. Install the Intel Access library, libIxp425.a
    2. Declare Environment Variable TOOLENV=arm
    3a. If you are building on Solaris, declare the environment
        variable 'CSR_BASE', which points to the top level directory
	of Intel's Access Software Library.
        e.g.: setenv CSR_BASE /Intel/ixp425/AccLib
    3b. Uncomment and modify the Makefile variable CSR_BASE to reflect
        the directory in step 3a.  This will allow project builds to
        work correctly.  This is optional if you are building from Solaris
        and prefer to use the CSR_BASE environment variable.
    4. Install the patch for SPR 89608 as follows (directories and
    folders are relative to your WIND_BASE tornado installation directory):
       On UNIX run the following commands:
          a. cd target/src/config/ixdp425/patch-SPR89608
          b. INSTALLPATCH
       On Windows do the following:
          a. open a folder to target/src/config/ixdp425/patch-SPR89608
          b. double click on INSTALLPATCH.BAT
    5. Rebuild the bsp.
.SS "Boot ROMs"
The boot image provided with this BSP includes a mechanism for loading
a standard VxWorks image over the fei driver on the included 82559 card.

The bootrom image has been tested running from flash.

.CS
  make bootrom.hex
.CE

This builds the file 'bootrom.hex' which can be burned into flash using
a dedicated flash burner or by using visionClick.

The board uses this image to boot and load VxWorks images developed
from the BSP over the network.

.IP "1)"
Copy the register files "ixdp425*.reg" to the ESTII\Regfiles\Xscale
directory. Start visionClick and configure the visionCLICK project:
In the 'Welcome To visionCLICK' window, click on the 'Configure' button,
this invokes the 'PROJECTS/LOAD' window.  In this window, click the '+'
left to '[e-mail]'.  This displays the project configuration.
Right-click the 'Emulator Register Configuration File' and cause it to
point to the ESTII\Regfiles\Xscale\ixdp425_burnrom.reg that was just
installed.
Right-click the 'Microprocessors' option and choose your CPU type, for
example: 'XSCALE->IXP425'.  Verify that the 'Target Control' option
points to 'visionPROBE' for visionPROBE I/II or 'visionICE' for visionICE
I/II.  Also, click the 'Communications' tab and verify that the
'Normal Port/Rate' and 'Download Port/Rate' are accurate for your connection,
for example: 'LPT1'  for visionPROBE II.  Click the 'Save' button at the
bottom of the window, then click the 'Activate' button.

.IP "2)"
Get into Background Mode:
Execute the 'IN' command to reset the board and initialize it with the
register setting.

.IP "3)"
Generating the visionCLICK compatible flash image:
In visionCLICK, select 'Convert Object Modules' from the Tools pull-down
menu.  This invokes the 'CONVERT BINARY AND SYMBOL OBJs' window:
        1. In the 'Select Input Object Module to Convert' slot, enter the
        full path of, or browse to, the 'bootrom.hex' image.

        2. Check the 'Create Flat BIN File For Flash Programming' box.

        3. Set the 'Range Of' field to 0x0, and the 'Range To' field
        to 0x00300000. This allows up to a 3 MB image to be processed. Larger
        images require an equivalently larger 'Range To' value.

        4. Click the 'Convert' button to initiate the conversion.

        5. The 'bootrom.bin' image will be generated in the same location
        as the source 'bootrom.hex' image.

.IP "4)"
Programming the ixdp425 flash:
In visionCLICK, select 'Program Flash Devices' from the Tools pull-down
menu.  This invokes the 'TF FLASH PROGRAMMING' window:

        1. In the 'Flash Card or PC Host File Name and Path' group,
        enter the full path to the location of the bootrom.bin in the edit box,
        or use the 'Select' button to browse to the file location.  Make sure
        the 'Bias' address is 0 by entering 0 in the
        '+/- Bias' edit box in the 'CHOOSE A FILE FROM HOST PC' dialog box.

        2. In the 'Programming Algorithm' group, in the edit box, click the
        'Select' button and select the following flash device:

        For the 16 MB on-board flash: 'INTEL  28F128Jx (8192 x  16)  1
        Device' or possibly 'INTEL  B28F128Jx (8192 x  16)  1 Device'

        3. Set the base address of the flash to 00000000, check the 'Erase to 0x'
        radio button setting the 'Erase to' value to 2fffff. This allows for a
        3 MB image. Larger images require an equivalently larger 'Erase to' value.

	4. Set the 'Available RAM Workspace' setting to 10300000. Set the
	'Bytes Of Target RAM Required' to 65360.

        5. Press the 'Erase Only' button.  Wait until the 'Done' response appears
	in the visionClick Terminal window.

	6. Press the 'Program Only' button. This process can take a
	few minutes. The process is complete when the 'OK' prompt appears.

.IP "5)"
Running the VxWorks Boot ROM program:
The flash memory is now programmed with the new boot program.  To execute
the new boot program, turn the board off and on.

.LP

.SS "Setting MAC and IP addresses"
This BSP uses the I2C EEPROM to store the ethernet interface's MAC and
IP addresses. If it is necessary to modify the MAC or IP addresses from
the delivered values then the following procedure should be followed:

.IP "1)"
Verify the board has a 8594 I2C EEPROM in position U23. This bsp will not
work with any other version of the I2C EEPROM.

.IP "2)"
Boot vxWorks.st

.IP "3)"
At the '->' prompt type 'ixdp425IfConfig' and answer the questions. An
example session is as follows:
.CS
-> ixdp425IfConfig
ixe0 MAC address: 00:02:b3:3c:16:95 
ixe1 MAC address: 00:02:b3:3c:16:96 

ixe0 IP address: 192.168.50.1
ixe1 IP address: 192.168.60.1

fei0 IP address: 192.168.10.1
fei1 IP address: 192.168.20.1
fei2 IP address: 192.168.30.1
fei3 IP address: 192.168.40.1

Any Changes (y/n)> y

Change a MAC address (y/n)> y
ixe0 MAC address: 00:02:b3:3c:16:95 00:02:b3:3c:16:95
ixe1 MAC address: 00:02:b3:3c:16:96 00:02:b3:3c:16:96

Change ixe IP address (y/n)> y
ixe0 IP address: 128.224.195.146  128.224.195.148
ixe1 IP address: 128.224.145.147  128.224.195.149

Change fei IP address (y/n)> n

Any Changes (y/n)> n

Writing interface data to non-volatile storage...
New configuration written, changes will take effect after a reboot
value = 0 = 0x0
->
.CE

.IP "4)"
Reboot the board
-> Ctl-X

.LP
.SS "Make Targets"
Supported targets are: bootrom, vxWorks, vxWorks.st, vxWorks_rom,
, vxWorks.st_rom, and these files associated .hex files. Any of
the .hex files may be substituted for bootrom.hex for programming
into Flash.

.SS "Libraries"
This BSP release requires three directories which contain object 
files for the XScale microarchitecture:
.CS
    target/lib/objXScalegnubevx 
    target/lib/objXScalegnubevxwv
    target/lib/objXScalegnubetest
.CE

These object files are built into the following architecture libraries:
.CS
    target/lib/libXScalegnubevx.a  
    target/lib/libXScalegnubewv.a    
    target/lib/libXScalegnubegcc.a
    target/lib/libXScalegnubetest.a
.CE

Additionally, the Intel Access library $(CSR_BASE)/lib/$(TOOLENV)objs/libIxp425.a
is required to support the Intel Network Processor based Ethernet ports.

These files, along with the BSP, are used to construct a VxWorks image 
designed to run on the IXDP425 evaluation board.  Please refer to the 
.I "Tornado BSP Developer's Kit for VxWorks User's Guide" 
for more information on building the various VxWorks images.

.SS "Flash memory as NVRAM"
This BSP may be configured to use FLASH memory for NVRAM storage.  The
BSP must be configured with INCLUDE_FLASH to enable this.  Also,
USE_FLASH_STORAGE must be defined in order to enable storage of the
vxWorks bootline in FLASH.

The equivalent functionality is supported in EEPROM. Please see 'I2C
EEPROM' for this configuration.

.SS "I2C EEPROM"
This BSP is configured with INCLUDE_EEPROM defined and you have read and
write access to the I2C EEPROM on the board using a software emulated
I2C bus protocol. USE_EEPROM_STORAGE is also defined and the vxWorks bootline
is stored in EEPROM. 

The diagram below shows the EEPROM when used as NVRAM storage:

.bS

  +----+ Top of 512byte EEPROM.
  |    |
  |    |  MAC address storage.
  |____|_ EEPROM + 256 Bytes    -- NV_GENERIC_STORAGE_AREA
  |    |
  |    |  Boot Line Storage
  |    |
  +----+ Bottom of EEPROM       -- sysNvRamGet/sysNvRamGet

.bE

The equivalent functionality is supported in NVRAM. Please see 'Flash
memory as NVRAM' for this configuration.

Please refer to the .I "Tornado User's Guide" for more information on booting VxWorks.

.SS "SDRAM"