rominit.s

ixp2400 bsp for vxworks

/* romInit.s - vxWorks ixdp2400 initialization module */

/* Copyright 2001 Wind River Systems, Inc. */

/*
modification history
--------------------
01a,02apr02,vgd  created from brh80200 BSP.
*/

#define _ASMLANGUAGE
#include "vxWorks.h"
#include "arch/arm/arm.h"
#include "sysLib.h"
#include "config.h"

        .data
        .globl   VAR(copyright_wind_river)
        .long    VAR(copyright_wind_river)

/*** Local macros ***/

#define IMMED1  #1
#define IMMED0  #0
#define IMMEDF0 #F0
#define DELAY(cycles, reg0)          \
        ldr     reg0, =cycles ;      \
        subs    reg0, reg0, IMMED1 ; \
        subne   pc,  pc, IMMED12 ;


/* 4 char Display macro */

#define HEX_DISPLAY_THIS(reg0, reg1, char4, char3, char2, char1) \
	ldr     reg0, =IXP2400_PROD_ID ;             \
	ldr 	reg1, [reg0] ;             \
	ldr     reg0, =MAJ_REV ;           \
	and 	reg1, reg1, reg0 ;         \
	cmp 	reg1, IMMED0 ; 		   \
	beq	777f ; 			   \
	ldr     reg0, =ALPHANUM_DIS_DATA ; \
	ldr     reg1, =char1 ;             \
        strb    reg1, [reg0], IMMED1 ;     \
        ldr     reg1, =char2 ;             \
        strb    reg1, [reg0], IMMED1 ;     \
        ldr     reg1, =char3 ;             \
        strb    reg1, [reg0], IMMED1 ;     \
        ldr     reg1, =char4 ;             \
        strb    reg1, [reg0] ;		   \
	b       778f  ;			   \
777:	ldr     reg0, =ALPHANUM_DIS_DATA ; \
	ldr     reg1, =char4 ;             \
        strb    reg1, [reg0], IMMED1 ;     \
        ldr     reg1, =char3 ;             \
        strb    reg1, [reg0], IMMED1 ;     \
        ldr     reg1, =char2 ;             \
        strb    reg1, [reg0], IMMED1 ;     \
        ldr     reg1, =char1 ;             \
        strb    reg1, [reg0] ;		   \
778:    





#define ROM_ENTRY  (ROM_TEXT_ADRS - IXP2400_FLASH_BASE)

        .data
        .align 4

        .globl  VAR(_sdata)
        .globl  _sdata
	
_sdata:
VAR_LABEL(sdata)
        .asciz  "start of data seg"

        .text
        .align  4

        /* globals */
        .globl  FUNC(romInit)
        .globl  _romInit
        .globl  _start
        .globl  _vectorTable
        .globl  FUNC(sysRomVecUndefInstuc)
        .globl  FUNC(sysRomVecSoftwareInt)
        .globl  FUNC(sysRomVecPrefetchAbort)
        .globl  FUNC(sysRomVecDataAbort)
        .globl  FUNC(sysRomVecUnknow)
        .globl  FUNC(sysRomVecIRQ)
        .globl  FUNC(sysRomVecFIQ)

        /* externals */
        .extern _romStart

_start:

/*******************************************************************************
*
* vectorTable - vector jump tabel
*
*/

/* All vectors destroys r0, r1, and r2 */

	/* Register Usage:
	* r0 contains the vector number but used for temp use
	* r1 should contain the vector number in 7seg format
	* r2 Used for temp use
	*/

_vectorTable:
        ldr     pc, =ROM_ENTRY
        B       FUNC(sysRomVecUndefInstuc)
        B       FUNC(sysRomVecSoftwareInt)
        B       FUNC(sysRomVecPrefetchAbort)
        B       FUNC(sysRomVecDataAbort)
        B       FUNC(sysRomVecUnknow)
        B       FUNC(sysRomVecIRQ)
        B       FUNC(sysRomVecFIQ)

        .ltorg
_ARM_FUNCTION(sysRomVecUndefInstuc)
        ldr     pc, UNDEFINSInt

_ARM_FUNCTION(sysRomVecSoftwareInt)
        ldr     pc, SOFTWAREINTIsr

_ARM_FUNCTION(sysRomVecPrefetchAbort)
        ldr     pc, PREFETCHABORTIsr

_ARM_FUNCTION(sysRomVecDataAbort)
        ldr     pc, VECDATAABORTIsr

_ARM_FUNCTION(sysRomVecUnknow)
        ldr     pc, UNKNOWVECIsr

_ARM_FUNCTION(sysRomVecIRQ)
        ldr     pc, IRQRAMIsr

_ARM_FUNCTION(sysRomVecFIQ)
        ldr     pc, FIQRAMIsr

        .balign 0x100, 0x0000

UNDEFINSInt:
        .long FUNC(sysRomVecUndefInstuc)

SOFTWAREINTIsr:
        .long FUNC(sysRomVecSoftwareInt)

PREFETCHABORTIsr:
        .long FUNC(sysRomVecPrefetchAbort)

VECDATAABORTIsr:
        .long FUNC(sysRomVecDataAbort)

UNKNOWVECIsr:
        .long FUNC(sysRomVecUnknow)

IRQRAMIsr:
        .long FUNC(sysRomVecIRQ)

FIQRAMIsr:
        .long FUNC(sysRomVecFIQ)

/*
- Caching Uint requires MMU
- The portion of the cache is used as internal data RAM, and since cache unit
  requires MMU, the MMU should be ON in order to access the internal data RAM.
*/

#ifdef _DIAB_TOOL

PT_ENTRY: .macro base,x,ap,p,d,c,b,total
        .if total
                .if total <= 0x40
                        .long ((base<<20)|(x<<12)|(ap<<10)|(p<<9)|(d<<5)|(c<<3)|(b<<2)|2)
                        PT_ENTRY (base+1),x,ap,p,d,c,b,(total-1)
                .else
                        .if total <= 0x256
                                PT_ENTRY base,x,ap,p,d,c,b,0x40
                                PT_ENTRY (base+0x40),x,ap,p,d,c,b,(total-0x40)
                        .else
                                PT_ENTRY base,x,ap,p,d,c,b,0x256
                                PT_ENTRY (base+0x256),x,ap,p,d,c,b,(total-0x256)
                        .endif
                .endif
        .endif
        .endm

/* Coarse page descriptor contains 14 bits, since it is easy to manipulate
 * the hex values, here the addr is shifted only by 12 bits, instead of 14bits.
 * So make sure that bit 11 and 10 are set to correctly in  options.
 * Bit 11 and 10 in options should contain the 2 LSBs from the coarse page address
 */

COARSE_ENTRY: .macro addr,options
        .long ((addr<<12)|options)
        .endm

/*
 * Extended Small Page Tables
 */

EX_ENTRY: .macro base,x,ap,c,b,total
        .if total
                .if total <= 0x40
                        .long ((base<<12)|(x<<6)|(ap<<4)|(c<<3)|(b<<2)|3)
                        EX_ENTRY (base+1),x,ap,c,b,(total-1)
                .else
                        .if total <= 0x256
                                EX_ENTRY base,x,ap,c,b,0x40
                                EX_ENTRY (base+0x40),x,ap,c,b,(total-0x40)
                        .else
                                EX_ENTRY base,x,ap,c,b,0x256
                                EX_ENTRY (base+0x256),x,ap,c,b,(total-0x256)
                        .endif
                .endif
        .endif
        .endm

INVALID_ENTRY: .macro total
        .if total
                .if total <= 0x40
                        .long (0)
                        INVALID_ENTRY (total-1)
                .else
                        .if total <= 0x256
                                INVALID_ENTRY 0x40
                                INVALID_ENTRY (total-0x40)
                        .else
                                INVALID_ENTRY 0x256
                                INVALID_ENTRY (total-0x256)
                        .endif
                .endif
        .endif
        .endm

#else /* GNU */

.MACRO PT_ENTRY base,x,ap,p,d,c,b,total=0
.if \total
   .if \total <= 0x40
      .long (\base << 20) | (\x << 12) | (\ap << 10) | (\p << 9) | (\d << 5) | (\c << 3) | (\b << 2) | 2
      PT_ENTRY "(\base+1)",\x,\ap,\p,\d,\c,\b,"(\total-1)"
   .else
       .if \total <= 0x256
           PT_ENTRY \base,\x,\ap,\p,\d,\c,\b,0x40
           PT_ENTRY "(\base+0x40)",\x,\ap,\p,\d,\c,\b,"(\total-0x40)"
       .else
           PT_ENTRY \base,\x,\ap,\p,\d,\c,\b,0x256
           PT_ENTRY "(\base+0x256)",\x,\ap,\p,\d,\c,\b,"(\total-0x256)"
       .endif
   .endif
.endif
.ENDM

/* Coarse page descriptor contains 14 bits, since it is easy to manipulate
 * the hex values, here the addr is shifted only by 12 bits, instead of 14bits.
 * So make sure that bit 11 and 10 are set to correctly in  options.
 * Bit 11 and 10 in options should contain the 2 LSBs from the coarse page address
 */

.MACRO COARSE_ENTRY addr=0,options=0
   .long ((\addr << 12) | \options)
.ENDM

/*
 * Extended Small Page Tables
 */

.MACRO EX_ENTRY base,x,ap,c,b,total=0
.if \total
   .if \total <= 0x40
      .long (\base << 12) | (\x << 6) | (\ap << 4) | (\c << 3) | (\b << 2) | 3
      EX_ENTRY "(\base+1)",\x,\ap,\c,\b,"(\total-1)"
   .else
       .if \total <= 0x256
           EX_ENTRY \base,\x,\ap,\c,\b,0x40
           EX_ENTRY "(\base+0x40)",\x,\ap,\c,\b,"(\total-0x40)"
       .else
           EX_ENTRY \base,\x,\ap,\c,\b,0x256
           EX_ENTRY "(\base+0x256)",\x,\ap,\c,\b,"(\total-0x256)"
       .endif
   .endif
.endif
.ENDM

.MACRO INVALID_ENTRY total=0
.if \total
   .if \total <= 0x40
       .long (0)
       INVALID_ENTRY "(\total-1)"
   .else
       .if \total <= 0x256
           INVALID_ENTRY 0x40
           INVALID_ENTRY "(\total-0x40)"
       .else
           INVALID_ENTRY 0x256
           INVALID_ENTRY "(\total-0x256)"
       .endif
   .endif
.endif
.ENDM

#endif /* _DIAB_TOOL */

/*
 * PT_ENTRY base,x,ap,p,d,c,b,total
 * map everything flat for bring up
 */

        .balign MMU_TRANSLATION_BASE, 0x0000

mmu_table:

/* Make SDRAM(32 MB) used by vxworks rw, cacheable and bufferable*/
PT_ENTRY 0x1e0,0,3,0,0,1,1,0x020

/*make SDRAM(480MB) used by microengines and drivers EXnoncacheable, EXbuffereable*/
PT_ENTRY 0x0,1,3,0,0,0,1,0x1e0

/*IXP2400 supports 2GB of DRAM, but our SDRAM module is only 512MB.
 *so make the rest of memory invalid
 */
INVALID_ENTRY 0x600

/*make SRAM (1GB)rw, EXnoncacheable and EXbufferable*/
PT_ENTRY 0x800,1,3,0,0,0,1,0x400

/* Make CSR, flash and PCI Mem as rw, EXnoncacheable and EXbufferable. total 1GB*/
PT_ENTRY 0xc00,1,3,0,0,0,1,0x400

/* any data added here should be reflect in ROM_TEXT_BASE in Makefile as well as in config.h */

        .text
        .align 4

/*******************************************************************************
*
* romInit - entry point for VxWorks in ROM
*
* This is the start of the ROM code.  The CPU will vector here upon reset.
*
* romInit
*     (
*     int startType     /@ only used by 2nd entry point @/
*     )
*
* INTERNAL
* sysToMonitor examines the ROM for the first instruction and the string
* "Copy" in the third word so if this changes, sysToMonitor must be updated.
*
* Register r8 holds startType until jump to the code that starts the whole
* vxWorks boot process
*
*/

_ARM_FUNCTION(romInit)
_romInit:
cold:
    
		MOV     r0, #BOOT_COLD   /* fall through to warm boot entry */

warm:

        B       bootStart

	/* copyright notice appears at beginning of ROM (in TEXT segment) */
        .ascii  "Copyright 2000 Wind River Systems, Inc. "
        .align 4

bootStart:

		/*If the flash is already unaliased by the time we are here,
		 *then we are coming from BM. so set the BOOT_THRU_BM flag
         */

		ldr	r1, =IXP2400_MISC_CONTROL		/* Load the addr ofmisc controlReg in r0*/
		ldr	r2, [r1]						/* read the reg value into r2*/
		and r2, r2, #FLASH_ALIAS_DISABLE
		cmp r2, #FLASH_ALIAS_DISABLE
		bne 100f
		cmp r0, #BOOT_COLD
		bne 100f
		orr r0,r0,#BOOT_THRU_BM	

		/*Read the flash offset of vxworks_rom image in mail box1 
		 *register when booting from BM
         */
		ldr r2, =IXP2400_MAILBOX1 	/*load arress of mailbox reg in r1*/
		ldr r1, [r2] 				/*r1 contains the address in MAILBOX1*/

		/* Store the offset in scratch pad because, 
		 * MailBox register contents are lost when PCI is reset
		 */
		ldr r2, =VXWORKS_TEXT_ADDR_LOC