sysalib.s

ixp2400 bsp for vxworks

*
* NOTE: This routine should not be called by the user.
*
* RETURNS: N/A

* sysInit ()              /@ THIS IS NOT A CALLABLE ROUTINE @/

*/

_ARM_FUNCTION(sysInit)
 
/* Disable Interrupts */
        MRS     r1, cpsr                /* get current status */
        ORR     r1, r1, #I_BIT | F_BIT  /* disable IRQ and FIQ */
        MSR     cpsr, r1

/* Interrupts Disabled */
        ldr     r1, =IXP2400_IRQ_ENABLE_CLR_REG /* Mask Interrupts */
        ldr     r2, =IXP2400_MASK_ALL_INT
        str     r2, [r1]

        adr     sp, FUNC(sysInit)       /* initialise stack pointer */
        mov     fp, #0                  /* initialise frame pointer */

/*This is done to take care of single flash scenario and booting form Boot Monitor*/    
		
#ifdef INCLUDE_PCI
		ldr r1, =IXP2400_STRAP_OPTIONS
		ldr r2, [r1]
		and r2, r2, #CFG_PCI_BOOT_HOST
		cmp r2, #CFG_PCI_BOOT_HOST
		bne skip_pci_reset

		ldr	r10, =IXP2400_RESET_0
		ldr	r1, [r10]
		orr	r1, r1, #PCIRST
		orr	r1, r1, #RESET_PCI
		str	r1, [r10]
		ldr	r3, =0x0

pci_reset_loop1:
		add r3, r3, #1
		cmp r3, #200
		bne pci_reset_loop1

		/*Note: need to skip this on slave*/
		/* take pci out of reset*/
		ldr	r10, =IXP2400_RESET_0
		ldr	r1, [r10]
		bic	r1, r1, #PCIRST
		bic	r1, r1, #RESET_PCI
		str	r1, [r10]

		/* 8 dummy writes to flush pci cmd fifo*/
pci_cmd_fifo_flush1:
		mov r3, #0x0
		ldr	r10, =IXP2400_MAILBOX0
		ldr	r1, =0x0
pci_cmd_fifo_flush_loop1:
		str	r1, [r10]
		add r3, r3, #1
		cmp r3, #8
		bne pci_cmd_fifo_flush_loop1

#if A0_REV
		/* set PCI rcomp registers*/
		ldr	r10, =IXP2400_PCI_RCOMP_OVER
		ldr	r1, =0x153239
		str	r1, [r10]
		/* write slave's pci rcomp register within 2000 cycles. */
		ldr	r10, =0xDA200060
		ldr	r1, =0x153239
		str	r1, [r10]
#endif 

#endif /*INCLUDE_PCI*/


skip_pci_reset:	   
		ldr r1, =IXP2400_STRAP_OPTIONS
		ldr r2, [r1]
		and r2, r2, #CFG_PROM_BOOT
		cmp r2, #CFG_PROM_BOOT
		beq 	112f
		mov r0, #BOOT_COLD


112:
  		

		tst r0, #BOOT_COLD
	 	bne 	115f 
		
		MOV	r0, #BOOT_WARM_AUTOBOOT	/* pass startType */

115:
		ldr r2, =VXWORKS_TEXT_ADDR_LOC 
		ldr r1, [r2]
		ldr r3, =BOOTROM_TEXT_ADRS
		cmp r1, r3
		bne  FUNC(usrInit)
		orr r0,r0, #BOOTROM_THRU_BM
		orr r0,r0, #BOOT_THRU_BM


/* now call usrInit */
        b       FUNC(usrInit)

#endif /* INCLUDE_HSI_PROBE */


/*******************************************************************************
*
* sysIntStackSplit - split interrupt stack and set interrupt stack pointers
*
* This routine is called, via a function pointer, during kernel
* initialisation.  It splits the allocated interrupt stack into IRQ and
* SVC-mode stacks and sets the processor's IRQ stack pointer. Note that
* the pointer passed points to the bottom of the stack allocated i.e.
* highest address+1.
*
* NOMANUAL

* void sysIntStackSplit
*     (
*     char *pBotStack   /@ pointer to bottom of interrupt stack @/
*     long size		/@ size of stack @/
*     )

*/

_ARM_FUNCTION_CALLED_FROM_C(sysIntStackSplit)

/*
 * Split stack into 2 - IRQ and SVC-mode interrupt stacks.
 * IRQ stack needs 6 words per nested interrupt;
 * SVC-mode will need a good deal more for the C interrupt handlers.
 * For now, use ratio 1:7 with any excess allocated to the SVC-mode stack
 * at the lowest address.
 *
 * Note that FIQ is not handled by VxWorks so no stack is allocated for it.
 *
 * The stacks and the variables that describe them look like this.
 *
 *         - HIGH MEMORY -
 *     ------------------------ <--- vxIrqIntStackBase (r0 on entry)
 *     |                      |
 *     |       IRQ-mode       |
 *     |    interrupt stack   |
 *     |                      |
 *     ------------------------ <--{ vxIrqIntStackEnd
 *     |                      |    { vxSvcIntStackBase
 *     |       SVC-mode       |
 *     |    interrupt stack   |
 *     |                      |
 *     ------------------------ <--- vxSvcIntStackEnd
 *         - LOW  MEMORY -
 *
 *
 * r0 = base of space allocated for stacks (i.e. highest address)
 * r1 = size of space
 */

        SUB     r2,r0,r1                /* r2 -> lowest usable address */
        LDR     r3,L$_vxSvcIntStackEnd
        STR     r2,[r3]                 /*  == end of SVC-mode stack */
        SUB     r2,r0,r1,ASR #3         /* leave 1/8 for IRQ */
        LDR     r3,L$_vxSvcIntStackBase
        STR     r2,[r3]

/* now allocate IRQ stack, setting irq_sp */

        LDR     r3,L$_vxIrqIntStackEnd
        STR     r2,[r3]
        LDR     r3,L$_vxIrqIntStackBase
        STR     r0,[r3]

        MRS     r2,cpsr
        BIC     r3,r2,#MASK_MODE
        ORR     r3,r3,#MODE_IRQ32 | I_BIT       /* set irq_sp */
        MSR     cpsr,r3
        MOV     sp,r0

/* switch back to original mode and return */

        MSR     cpsr,r2
        MOV     pc,lr

/*****************************************************************************
* sysGetTransTblBase - Get Translation Table Base register.
*
* RETURNS:       UINT32 containing the Translation Table Base.
*/

_ARM_FUNCTION_CALLED_FROM_C(sysGetTransTblBase)

        mrc     p15, 0, r0, c2, c0, 0   /* Get Translation Table Base register */
        ldr     r1, =0xffffc000
        and     r0, r0, r1              /* remove reserved bits                */
        mov     pc, lr

/*******************************************************************************
* sysWrite16 - explicitly perform a 16-bit write
*
* This routine simply performs a 16-bit write, i.e. an STRH instruction. This
* would be used for I/O peripherals where it is significant whether a
* store is an STR, STRB or STRH. This routine may be particularly
* useful when the behaviour of the C compiler is not appropriate.
*
* NOTE
* For reasons of efficiency, this routine does not establish a stack frame.
*
* RETURNS: N/A
*
* void sysWrite16
*       (
*       volatile UINT16 *       address,        /@ address to write to @/
*       UINT16                  data            /@ data to write @/
*       )
*
*/

_ARM_FUNCTION_CALLED_FROM_C(sysWrite16)

        STRH    r1, [r0]        /* Store the 16-bit quantity */
        MOV     pc, lr          /* Return */

/*******************************************************************************
* sysRead16 - explicitly perform a 16-bit read
*
* This routine simply performs a 16-bit read, i.e. an LDRH instruction. This
* would be used for I/O peripherals where it is significant whether a store
* is an LDR, LDRB or LDRH.
*
* NOTE
* For reasons of efficiency, this routine does not establish a stack frame.
*
* RETURNS: the value read
*
* UINT16 sysRead16
*       (
*       volatile UINT16 *       address,        /@ address to read @/
*       )
*
*/

_ARM_FUNCTION_CALLED_FROM_C(sysRead16)

        LDRH    r0, [r0]        /* Load the 16-bit quantity */
        MOV     pc, lr          /* Return */

/*******************************************************************************
*
* swap32 - swap the bytes in a 32-bit word
*
* This routine swaps the bytes in a 32-bit word;  i.e. it would convert
* 0x12345678 to 0x78563412.
*
* NOTE
* For reasons of efficiency, this routine does not establish a stack frame.
*
* RETURNS: the swapped data
*
* UINT32 swap32
*       (
*       UINT32                  data            /@ data to be swapped @/
*       )
*/

_ARM_FUNCTION_CALLED_FROM_C(swap32)

        /* Assume r0 initially contains 11223344 */
        AND     r1, r0, #0x0000FF00 /* r1 = 00003300 */
        MOV     r1, r1, lsl #8      /* r1 = 00330000 */
        ORR     r1, r1, r0, lsl #24 /* r1 = 44330000 */
        AND     r2, r0, #0x00FF0000 /* r2 = 00220000 */
        ORR     r1, r1, r2, lsr #8  /* r1 = 44332200 */
        ORR     r0, r1, r0, lsr #24 /* r0 = 44332211 */
        MOV     pc, lr          /* Return */

/*******************************************************************************
*
* swap16 - swap the bytes in a 16-bit word
*
* This routine swaps the bytes in a 16-bit word;  i.e. it would convert
* 0x1234 to 0x3412.
*
* NOTE
* For reasons of efficiency, this routine does not establish a stack frame.
*
* RETURNS: the swapped data
*
* UINT16 swap16
*       (
*       UINT16                  data            /@ data to be swapped @/
*       )
*/

_ARM_FUNCTION_CALLED_FROM_C(swap16)

        /* Assume r0 initially contains xxxx1122 */
        MOV     r0, r0, lsl #16     /* r0 = 11220000 */
        MOV     r1, r0, lsl #8      /* r1 = 22000000 */
        ORR     r1, r1, r0, lsr #8  /* r1 = 22112200 */
        MOV     r0, r1, lsr #16     /* r0 = 00002211 */
        MOV     pc, lr          /* Return */

L$_vxSvcIntStackBase:   .long   VAR(vxSvcIntStackBase)
L$_vxSvcIntStackEnd:    .long   VAR(vxSvcIntStackEnd)
L$_vxIrqIntStackBase:   .long   VAR(vxIrqIntStackBase)
L$_vxIrqIntStackEnd:    .long   VAR(vxIrqIntStackEnd)


/*******************************************************************************
*
* singleFlashBoot - routine to support boot from PCI on slave
*
* This routine will have instruction to jump to SDRAM_HIFG_PHY on the slave when booted from PCI.
*
*
* RETURNS: None
*
* void singleFlashBoot
*       (
*       void
*       )
*/


        .ltorg
_ARM_FUNCTION_CALLED_FROM_C(singleFlashBootHi)

	ldr PC, =SLAVE_ENTRY_ADRS_HI
       
        .ltorg

        .ltorg
_ARM_FUNCTION_CALLED_FROM_C(singleFlashBootLow)

	ldr PC, =SLAVE_ENTRY_ADRS_LOW
       
        .ltorg

/***EOF***/