ixdp2400pci.c

ixp2400 bsp for vxworks

		temp = *((volatile UINT32 *)(csrBarAddr + i));
#endif
	}

	/* Program CS# x16 pull-up and pull-down Slew Lookup table registers */
	/* (cr0_dcsx16pslew0 - cr0_dcsx16pslew3) and (cr0_dcsx16nslew0 - cr0_dcsx16nslew3) */
	for(i = (SLAVE_DRAM_CH0_BASE + 0x2F8); i <= (SLAVE_DRAM_CH0_BASE + 0x330); i += 8)
	{
		*((volatile UINT32 *)(csrBarAddr + i)) = 0xcccccccc;
#if A0_REV
		temp = *((volatile UINT32 *)(csrBarAddr + i));
#endif
	}

	/* Program CK CK# x8 pull-up and pull-down Slew Lookup table registers */
	/* (cr0_dckx8pslew0 - cr0_dckx8pslew3) and (cr0_dckx8nslew0 - cr0_dckx8nslew3) */
	for(i = (SLAVE_DRAM_CH0_BASE + 0x340); i <= (SLAVE_DRAM_CH0_BASE + 0x378); i += 8)
	{
		*((volatile UINT32 *)(csrBarAddr + i)) = 0xcccccccc;
#if A0_REV
		temp = *((volatile UINT32 *)(csrBarAddr + i));
#endif
	}

	/* Program CK CK# x16 pull-up and pull-down Slew Lookup table registers */
	/* (cr0_dckx16pslew0 - cr0_dckx16pslew3) and (cr0_dckx16nslew0 - cr0_dckx16nslew3) */
	for(i = (SLAVE_DRAM_CH0_BASE + 0x380); i <= (SLAVE_DRAM_CH0_BASE + 0x3B8); i += 8)
	{
		*((volatile UINT32 *)(csrBarAddr + i)) = 0xcccccccc;
#if A0_REV
		temp = *((volatile UINT32 *)(csrBarAddr + i));
#endif
	}

	/* Flag Slew Programmed register as done */
	*((volatile UINT32 *)(csrBarAddr + CR0_SLEWPROGRAMMED_FRM_PCI)) = 0x1;
#if A0_REV
	temp = *((volatile UINT32 *)(csrBarAddr + CR0_SLEWPROGRAMMED_FRM_PCI));
#endif

	/* Force SM Rcomp */
	*((volatile UINT32 *)(csrBarAddr + CR0_FRCSMRCOMP_FRM_PCI)) = 0x1;
#if A0_REV
	temp = *((volatile UINT32 *)(csrBarAddr + CR0_FRCSMRCOMP_FRM_PCI));
#endif
delayUSec(1000);
	*((volatile UINT32 *)(csrBarAddr + CR0_FRCSMRCOMP_FRM_PCI)) = 0x0;
#if A0_REV
	temp = *((volatile UINT32 *)(csrBarAddr + CR0_FRCSMRCOMP_FRM_PCI));
#endif

	/* cr0_ovrrideh: turn off h override, 0x0 */
	*((volatile UINT32 *)(csrBarAddr + CR0_OVRRIDEH_FRM_PCI)) = 0x0;
#if A0_REV
	temp = *((volatile UINT32 *)(csrBarAddr + CR0_OVRRIDEH_FRM_PCI));
#endif

	/* cr0_ovrridev: turn off v override, 0x0 */
	*((volatile UINT32 *)(csrBarAddr + CR0_OVRRIDEV_FRM_PCI)) = 0x0;
#if A0_REV
	temp = *((volatile UINT32 *)(csrBarAddr + CR0_OVRRIDEV_FRM_PCI));
#endif

	/* De-Select Test Mode (cr0_jt_config)
	// User Overide RCOMP settings */
	*((volatile UINT32 *)(csrBarAddr + CR0_JT_CONFIG_FRM_PCI)) = 0x0;
#if A0_REV
	temp = *((volatile UINT32 *)(csrBarAddr + CR0_JT_CONFIG_FRM_PCI));
#endif










		delayUSec(1000);

		IXP2400_REG_WRITE((csrBarAddr + SLAVE_DU_CONTROL), DU_CONTROL_VAL);
#if A0_REV
		temp = *((volatile UINT32 *)(csrBarAddr + SLAVE_DU_CONTROL));
#endif
		IXP2400_REG_WRITE((csrBarAddr + SLAVE_DU_INIT), CKE);
#if A0_REV
		temp = *((volatile UINT32 *)(csrBarAddr + SLAVE_DU_INIT));
#endif
		IXP2400_REG_WRITE((csrBarAddr + SLAVE_DU_INIT),
			(PRECHARGE | SIDE1 | SIDE0 | PRECHARGE_ALL));
		while(*((volatile UINT32 *)(csrBarAddr + SLAVE_DU_INIT)) & PRECHARGE)
		{
			delayUSec(1000);
		}

		IXP2400_REG_WRITE((csrBarAddr + SLAVE_DU_INIT),
			(LD_MODE_REG | SIDE1 | SIDE0 | EXT_LD_MODE));
		while(*((volatile UINT32 *)(csrBarAddr + SLAVE_DU_INIT)) & LD_MODE_REG)
		{
			delayUSec(1000);
		}

		IXP2400_REG_WRITE((csrBarAddr + SLAVE_DU_INIT),
			(LD_MODE_REG | SIDE1 | SIDE0 | RESET_DLL));
		while(*((volatile UINT32 *)(csrBarAddr + SLAVE_DU_INIT)) & LD_MODE_REG)
		{
			delayUSec(1000);
		}

		IXP2400_REG_WRITE((csrBarAddr + SLAVE_DU_INIT),
			(PRECHARGE | SIDE1 | SIDE0 | PRECHARGE_ALL));
		while(*((volatile UINT32 *)(csrBarAddr + SLAVE_DU_INIT)) & PRECHARGE)
		{
			delayUSec(1000);
		}

		IXP2400_REG_WRITE((csrBarAddr + SLAVE_DU_INIT), (REFRESH | SIDE1 | SIDE0));
		while(*((volatile UINT32 *)(csrBarAddr + SLAVE_DU_INIT)) & REFRESH)
		{
			delayUSec(1000);
		}

		IXP2400_REG_WRITE((csrBarAddr + SLAVE_DU_INIT), (REFRESH | SIDE1 | SIDE0));
		while(*((volatile UINT32 *)(csrBarAddr + SLAVE_DU_INIT)) & REFRESH)
		{
			delayUSec(1000);
		}

		IXP2400_REG_WRITE((csrBarAddr + SLAVE_DU_INIT),
			(LD_MODE_REG | SIDE1 | SIDE0 | LOAD_MODE_NORMAL));
		while(*((volatile UINT32 *)(csrBarAddr + SLAVE_DU_INIT)) & LD_MODE_REG)
		{
			delayUSec(1000);
		}

		*((volatile UINT32 *)(csrBarAddr + SLAVE_DU_ECC_TEST)) |= DISABLE_CHK;
#if A0_REV
		temp = *((volatile UINT32 *)(csrBarAddr + SLAVE_DU_ECC_TEST));
#endif
		*((volatile UINT32 *)(csrBarAddr + SLAVE_MISC_CONTROL)) |=
			FLASH_ALIAS_DISABLE;
#if A0_REV
		temp = *((volatile UINT32 *)(csrBarAddr + SLAVE_MISC_CONTROL));
#endif

		temp = (dramBarAddr & 0xE0000000) >> 16;
		IXP2400_REG_WRITE(IXP2400_PCI_ADDR_EXT, temp);
		dramBarAddr &= ~(0xE0000000);
		dramBarAddr += CPU_PCI_MEM_ADRS;

#if SINGLE_BOOTROM
		sysLEDDisplay('B','R','O','M');
		/* check slave's 1M SDRAM */
		for(i = 0x4000; i < SZ_4K; i = i + 4)
		{
			*((volatile UINT32 *)(dramBarAddr + i)) = 0xA5A5A5A5;
			if(*((volatile UINT32 *)(dramBarAddr + i)) != 0xA5A5A5A5)
			{
				slaveSdramPassed = 0;
				break;
			}
		}
		
		if(slaveSdramPassed)
		{
			
			int bootrom_base;

			if(sysStartType & BOOTROM_THRU_BM)
			{
				bootrom_base = BOOTROM_OFFSET;
				vxWorksTextAddr = vxWorksTextAddr - 0x8000;
				/*sysLEDDisplay('B','M',' ',' ');		*/
			}
			else
			{
				bootrom_base = IXP2400_SLOW_PORT_BASE;
				/*sysLEDDisplay('N','O','B','M');	*/
			}
            /* copy the MMu table at 0x4000 in slave's SDRAM */
			for(i = 0x4000; i < 0x8000; i = i + 4)
			{
				*((volatile UINT32 *)(dramBarAddr + i)) =
					*((volatile UINT32 *)(bootrom_base + i));
#if A0_REV
				temp = *((volatile UINT32 *)(dramBarAddr + i));
#endif
			}
		}
#endif

		/* check slave's 2M SDRAM */
		for(i = SDRAM_HIGH_PHY; i < (SDRAM_HIGH_PHY + SZ_2M); i = i + 4)
		{
			*((volatile UINT32 *)(dramBarAddr + i)) = 0x5A5A5A5A;
			if(*((volatile UINT32 *)(dramBarAddr + i)) != 0x5A5A5A5A)
			{
				slaveSdramPassed = 0;
				break;
			}
		}
		if(slaveSdramPassed)
		{
			
			for(i = SDRAM_HIGH_PHY; i < (SDRAM_HIGH_PHY + SZ_2M); i = i + 4)
			{
				*((volatile UINT32 *)(dramBarAddr + i)) = 0x0;
			}
			/*sysLEDDisplay('B','M','S','3');*/
			if(sysStartType & BOOT_CMP_IMAGE)
			{
				slave_load_adrs = SDRAM_HIGH_PHY + RAM_HIGH_ADRS;
				slaveBootStart = (UINT32)(singleFlashBootHi);
				sysLEDDisplay('H','I','G','H');
			}
			else
			{
				slave_load_adrs = SDRAM_HIGH_PHY + RAM_LOW_ADRS;
				slaveBootStart = (UINT32)(singleFlashBootLow);
				sysLEDDisplay('L','O','W',' ');
			}
			
			ramCopyAdrs = (UINT32)SLAVE_LOAD_ADRS ;
			for(i = 0; i < 64; i = i + 4)
				*((volatile UINT32 *)(dramBarAddr +i)) =(*(volatile UINT32 *)(slaveBootStart+ i));

            /* now download VxWorks to slave's SDRAM */
			if(vxWorksTextAddr < 0x1000000)
			{
				for(i = ramCopyAdrs; i < (ramCopyAdrs+ SZ_2M); i = i + 4)
				{
					*((volatile UINT32 *)(dramBarAddr + i)) =
						*((volatile UINT32 *)(IXP2400_SLOW_PORT_BASE + vxWorksTextAddr +
						i - (ramCopyAdrs)));
#if A0_REV
					temp = *((volatile UINT32 *)(dramBarAddr + i));
#endif
				}
			}
			IXP2400_REG_WRITE(IXP2400_PCI_ADDR_EXT, 0x0);
			/* final step - take slave out of reset and I am done with slave. */
			*((volatile UINT32 *)(csrBarAddr + SLAVE_IXP_RESET0)) &= ~(RESET_XSCALE);
		}
	}
	if(pBoardCfgData->config_valid == CONFIG_DATA_VALID)
	{
		IXP2400_REG_WRITE(IXP2400_PCI_ADDR_EXT, 0x0);

		for(i = 0; i < sizeof(struct board_config); i = i + 4)
		{
			*((volatile UINT32 *)(csrBarAddr + SLAVE_SCRATCH_BASE + i)) = *((volatile UINT32 *)((UINT32)pBoardCfgData + i));
#if A0_REV
			temp = *((volatile UINT32 *)(csrBarAddr + SLAVE_SCRATCH_BASE + i));
#endif
		}
	}

	/* 82559 is LE. So, now I need to clear byte swapping bits so that when 82559 talks to IXP2400
	pci unit does byte swapping */
	IXP2400_REG_WRITE(IXP2400_PCI_ADDR_EXT, 0x0);
	*((volatile UINT32 *)(csrBarAddr + SLAVE_PCI_CONTROL)) &=
		~(IXP2400_PCI_CONTROL_BE_DEO | IXP2400_PCI_CONTROL_BE_DEI | IXP2400_PCI_CONTROL_BE_BEO
		| IXP2400_PCI_CONTROL_BE_BEI);
#if A0_REV
	temp = *((volatile UINT32 *)(csrBarAddr + SLAVE_PCI_CONTROL));
#endif
	*(UINT32 *)(IXP2400_PCI_CONTROL) &= ~(IXP2400_PCI_CONTROL_BE_DEO |
		IXP2400_PCI_CONTROL_BE_DEI | IXP2400_PCI_CONTROL_BE_BEO | IXP2400_PCI_CONTROL_BE_BEI);
	
	 intUnlock (locKey);
	
	/* connect slave ISR */
	pciIntConnect((void *)CPLD_INGRESS_NPU_INT, slaveNPUISR, 0);
    pciIntEnable(CPLD_INGRESS_NPU_INT);
}

/*******************************************************************************
*
* sysPciInitBridge - initialise PCI Transparent Bridge (21154)
*
* This function initialises the PCI transparent bridge.
*
* RETURNS: N/A
*/

void sysPciInitBridge(void)
{
	/* see if you can find 21154 */
	if(pciFindDevice(TB_VENDOR_ID, TB_DEVICE_ID, 0, &tbBusNo, &tbDeviceNo,
		&tbFuncNo) == ERROR)
		return;

	/* now configure the transparent bridge */
	pciConfigOutWord(tbBusNo, tbDeviceNo, tbFuncNo, PCI_CFG_PRIMARY_COMMAND, (SERR_ENABLE | PCI_CMD_STAT_VAL));
	pciConfigOutWord(tbBusNo, tbDeviceNo, tbFuncNo, PCI_CFG_BRIDGE_CONTROL, 0x23);
	pciConfigOutByte(tbBusNo, tbDeviceNo, tbFuncNo, PCI_CFG_PRIMARY_BUS, 0);
	pciConfigOutByte(tbBusNo, tbDeviceNo, tbFuncNo, PCI_CFG_SECONDARY_BUS, 1);
	pciConfigOutByte(tbBusNo, tbDeviceNo, tbFuncNo, PCI_CFG_SUBORDINATE_BUS, 2);
}

/*******************************************************************************
*
* sysPciInit - initialise PCI bridge controller
*
* This function initialises the PCI controlling parts.
*
* RETURNS: N/A
*/

void sysPciInit(void)
{
	int sramBarMaskArray[] = {0x1FC0000, 0x3FC0000, 0x7FC0000, 0xFFC0000};
	int sramBarSz;
	FAST int locKey;

	/* if there is no flash then pci init. is done by master. so don't do it again */
	if(strapOptionsVal & CFG_PROM_BOOT)
	{
		locKey = intLock();
        /* set the upper bits for pci mem and io transactions */
        IXP2400_REG_WRITE(IXP2400_PCI_ADDR_EXT, 0x0);
        
        sramBarSz = (strapOptionsVal & 0xC0) >> 6;
        IXP2400_REG_WRITE(IXP2400_PCI_SRAM_BAR_MASK, sramBarMaskArray[sramBarSz]);
        /*IXP2400_REG_WRITE(IXP2400_PCI_SRAM_BAR_MASK, 0x1FC0000);*/
        
        /* Setup SDRAM Base Address Mask Reg: 512MB window size */		
        IXP2400_REG_WRITE(IXP2400_DRAM_BASE_ADDR_MASK, 0x1FF00000);
        
        IXP2400_REG_WRITE(IXP2400_PCI_CMD_STAT, PCI_CMD_STAT_VAL);
        
        /* enable outbound pci int. from xscale */
        *(UINT32 *)(IXP2400_OUT_INT_MASK) &= XSIM;
        
        /* silicon bug work around */
        /* set the latency timer value to max */
#if A0_REV
        *(UINT32 *)(IXP2400_PCI_CACHE_LAT_HDR_BIST) |= (0x1F << 11);
#endif
        
        *(UINT32 *)(IXP2400_RESET_0) |= INIT_COMP;

        intUnlock (locKey);        

        /* if this is master npu then set master enable and init 21154 */
        if(strapOptionsVal & CFG_PCI_BOOT_HOST)
        {
            sysPciInitBridge();
        }

	}

    return;
}

/******************************************************************************
*
* sysPciToPhys - translate a Pci address to a physical address
*
* This function converts a Pci address to a physical address. This only works
* for PCI Memory space.
*
* RETURNS: the physical adddress
*/

void * sysPciToPhys(void *PciAddr)