readme

ixp2400 bsp for vxworks

                 README: Intel IXDP2400 board (ixdp2400_be)

This file contains board-specific information for the Intel IXDP2400
reference platform board.  This file documents BSP interface changes
from previous software or hardware versions, and notifies the user of
serious caveats that must be noted before using this BSP.  Additionally,
the target board's reference entry (e.g., man ixdp2400_be for UNIX or
the HTML reference entries) provides board-specific information
necessary to run VxWorks.  The target reference entry should be read
fully before this BSP is used.

-------------------------------------------------------------------------------

RELEASE 1.2/9

BSP (VxWorks):
--------------

List of bug fixes/enhancements :
-------------------------------

1) SCR 7176: Change MMU page table entries (XCB = 101)
2) SCR 7177: Build process of VxWorks BSP - changes to 'config.h'
3) Port to Tornado 2.2.1

Changes made to BSP :
--------------------

NOTE: The lines numbers referenced below may be different for the source files
from WindRiver. These line numbers are provided here as a refernce.

1) config.h:

  /Fix to SCR 7177 */
  Added macros to compile different targets

2) sysLib.c:

  /* Fix to SCR 7176 - Lines 179-180, 186-187, 193-194, 207-208, 214-215, 221-222 */
  Changed page attributes (from XCB = 001 to XCB = 101) for extended SRAM address space

3) sysALib.s:

  /* Fix to SCR 7176 - Line # 233 */
  Changed page attributes to CSR, flash and PCI Mem space (from XCB = 000 to XCB = 101)

4) In addition to the above, the following files have been modified by WindRiver Systems,
as part of their porting efforts to Tornado 2.2.1. No line numbers are provided
here as there are too many changes. It is suggested to do a 'diff' between the
current file and the new one to find the changes that have gone into these files.
Contact WindRiver systems on any questions on BSP source or patches.

         bootInit.c
         usrConfig.c
         usrExtra.c
         usrNetwork.c

RELEASE 1.2/8

List of bug fixes/enhancements :
-------------------------------

1) SCR-5598: Store boot parameters on flash on B0 system.
2) SCR-5908: VxWorks BSp does not initialize NIC on PMC slot
3) SCR-5909: CPLD read to be changed to 32 bits
4) SCR-5910: Occassional PCI hang during booting VxWorks
5) SCR-6593: Workaround to B0 silicon IO bug
6) SCR-6653: Race condition in flash driver
7) B0 silicon support
8) Minor code cleanup

Changes made to BSP :
--------------------

NOTE: The lines numbers referenced below may be different for the source files
from WindRiver. These line numbers are provided here as a refernce.

1) flashmem.c:

  /* Line 207 */
  Added a delay function sysFlashWriteDisable()

  /* line715 - Added the following as a fix to SCR 5598 */
  if ((getProductID(MAJ_REV)>>4)==1)
           *((FLASH_DEF *)((int)pFA^3)) = value;

2) pciIoMapLib.c:

  /* Line 404 - Fix to PCI hang */
  #if A0_rev
         while(temp & 0x20000000)
         {
                 *(UINT32 *)(IXP2400_PCI_CMD_STAT) = temp;
                 temp = *(UINT32 *)(IXP2400_PCI_CMD_STAT);
         }
  #else
         *(UINT32 *)(IXP2400_PCI_CMD_STAT) = temp;
  #endif

  /* Lines 573 - 586 */
  Changed code for pciConfigOutByte() to use vxMemProbe for PCI config writes

  /* Lines 613 - 627 */
  Changed code for pciConfigOutWord() to use vxMemProbe for PCI config writes

  /* Lines 653 - 663 */
  Changed code for pciConfigOutLong() to use vxMemProbe for PCI config writes

  /* Lines 739 - 755 */
  CPLD read in pciInt() is changed to read 32 bit from 8 bits

3) sysLib.c:

  /* Line 95 - Moved the following down to line 95, to have a clean build */
  #ifdef INCLUDE_FLASH
  #include "flashMem.c"
  #include "mem/nvRamToFlash.c"
  #else
  #include "mem/nullNvRam.c"

  /* Line 435 - Added fix to SCR 5909 in sysHWInit() */
  Replace (old code):
         boardRev = (*((volatile char *) CPLD_REV) & 0xf0) >> 4;
  With (new code):
         boardRev = (*((volatile UINT32 *) (CPLD_REV)) & 0xf0) >> 4;

  /* Fix to SCR 6593 in sysPhysMemDesc data structure */
  changed page attributes with XCB = 000 to XCB = 101
  Added a new function cacheDmaXMalloc()

4) ixdp2400.c:

  /* Lines 410,411,418,428,430 */
  Changed the cpld_rev and board_rev (from UINT8 to UINT32)

5) sysEnd.c

  /* Moved macros under #if A0_REV */
  The macros CSR_WORD_RD, CSR_LONG_RD, CSR_WORD_WR and CSR_LONG_WR
         (with pci fix for A0 silicon) were moved under #if A0_REV

  /* Fix to SCR 5908 sysLanPciInit() */
  Skiped PMC NIC on slave and assigned interrupts properly on master
  (Changed Line # 337, 351 and added 3 lines after line # 389)

  /* Line 227 */
  Removed a ","

  /* Fix for SCR 5908 in sys557Init() */
  Assigned interrupts properly (added 5 lines after Lin 546; Changed Line 562)

  /* Fix for SCR 5908 in sys557IntEnable() */
  Enabled correct interupts (aded 4 lines after Line 646)

  /* Fix for SCR 5908 in sysIntDisable() */
  Disabled correct interrupts (added 4 lines after Line 673)

  /* Workaround for SCR 6593 in sysLanPciInit () */
  Pass a memory pointer to fei driver (under INCLUDE_INTEL_HW_WORKAROUND define)

  /* Line 710 */
  Changed to disable interrupt for PMC NIC correctly

6) ixdp2400pci.c:

  /* Line 546 and 577 */
  Removed two LED displays, which were used during initial debug

  /* Line 705 - Fix for SCR 5910 in sysPciInit () */
  Commented out for A1 and B0 IXP2400 Rev

  /* Line 716 - 722 */
  Removed, as they are not needed

7) bootInit.c:

  Removed unwanted LED displays, which were used for initial debug

8) ixdp2400I2c.c:

  /* Fix to SCR 6593 in I2C_CLK(), I2C_DATA() and i2c_init() functions */
  Added reading back GPIO CSRs after writing (look for IXP2400_REG_READ)

  /* Code cleanup */
  Removed i2c_clk_cycles() function (not used). Other minor cleanup.

9) ixdp2400Timer.c:

  /* Fix to SCR 6593 in sysClkInt(), sysClkDisable() , sysClkEnable(),
     sysAuxClkInt(), sysAuxClkDisable() and  sysAuxClkEnable() functions */
  Added reading back Timer CSRs, after writing (look for IXP2400_REG_READ)

10) romInit.s:

  /* Lines 323, 331 and 334 */
  Changed page attributes with XCB = 000 to XCB = 101

11) ixdp2400.h:

  /* Line 446 */
  Changed DDR CSR base address

RELEASE 1.2/6

	Release from Wind River for Tornado 2.2 CP1.  Phase 6 Release.
	Revision number updated to match WR guidelines.