📄 lpc221x.h
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/*
* $Revision: 1.2 $
*/
#ifndef __LPC221x
#define __LPC221x
//XTAL frequency in Hz
#define XTALFREQ 14745600
#define CCLK XTALFREQ*4
//pclk must always be XTALFREQ/4 when using the ROM monitor.
#define PCLKFREQ (CCLK)
void LPC210xSystemInit();
void LPC210xInitVIC();
void LPC210xInitTimerInterrupt(void(*timer_func)());
void LPC210xInitExternalInterrupt0(void(*eint0_func)());
void LPC210xInitExternalInterrupt1(void(*eint1_func)());
void LPC210xInitExternalInterrupt2(void(*eint2_func)());
void LPC210xInitUART0Interrupt(void(*uart1rx_func)(unsigned char),
void(*uart1tx_func)());
void LPC210xInitTimer();
void LPC210xStartTimer();
void LPC210xInitEINT0();
void LPC210xInitEINT1();
void LPC210xInitEINT2();
unsigned char EINT0PinIsLow();
unsigned char EINT1PinIsLow();
unsigned char EINT2PinIsLow();
void LPC210xInitPIO();
void LPC210xLedSet(unsigned short led_state);
void LPC210xInitUART0();
//Transmits one byte via UART1
//Note: The UART1 THRE register must be empty before the call to this function.
void LPC210xUART0TxByte(unsigned char byte);
#include "io_macros.h"
/* BCFGx External memory controler */
typedef struct {
__REG32 IDCY :4;
__REG32 :1;
__REG32 WST1 :5;
__REG32 RBLE :1;
__REG32 WST2 :5;
__REG32 :8;
__REG32 BUSERR :1;
__REG32 WPERR :1;
__REG32 WP :1;
__REG32 BM :1;
__REG32 MW :2;
__REG32 AT :2;
} __bankcfg_bits;
/***************************************************************************
**
** Bank configuration registers
**
***************************************************************************/
__IO_REG32_BIT(BCFG0, 0xFFE00000,__READ_WRITE,__bankcfg_bits);
__IO_REG32_BIT(BCFG1, 0xFFE00004,__READ_WRITE,__bankcfg_bits);
__IO_REG32_BIT(BCFG2, 0xFFE00008,__READ_WRITE,__bankcfg_bits);
__IO_REG32_BIT(BCFG3, 0xFFE0000C,__READ_WRITE,__bankcfg_bits);
#endif // __LPC221x
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