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📄 qemu_ioport.txt

📁 本资料解释了部分Qemu和kvm的IO port指令
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					bit 0 right button pressed				  byte 1: resolution		 ED	dbl   set/reset mode indicators Caps Num Scrl				bit 2 = CapsLk, bit 1 = NumLk, bit 0 = ScrlLk		 EE	sngl  diagnostic echo. returns EE.		 EF	sngl  NOP (No OPeration). reserved for future use		 F0	dbl   get/set scan code set				00h get current set				01h scancode set 1 (except Type 2 ctrlr)				02h scancode set 2 (default)				03h scancode set 3		 F2	sngl  read keyboard ID (read two ID bytes)		 F2	sngl  read mouse ID (read two ID bytes)		 F3	dbl   set typematic rate/delay		 F3	dbl   set mouse sample rate in reports per second		 F4	sngl  enable keyboard		 F4	sngl  enable mouse		 F5	sngl  disable keyboard. set default parameters		 F5	sngl  disable mouse, set default parameters		 F6	sngl  set default parameters		 F7	sngl  [MCA] set all keys to typematic (scancode set 3)		 F8	sngl  [MCA] set all keys to make/release		 F9	sngl  [MCA] set all keys to make only		 FA	sngl  [MCA] set all keys to typematic/make/release		 FB	sngl  [MCA] set al keys to typematic		 FC	dbl   [MCA] set specific key to make/release		 FD	dbl   [MCA] set specific key to make only		 FE	sngl  resend last scancode		 FF	sngl  perform internal power-on reset function		 FF	sngl  reset mouse		Note:	must issue command D4h to port 64h first to access			  mouse functions0060	r	KeyBoard or KB controller data output buffer (via PPI on XT)0061	w	KB controller port B (ISA, EISA)   (PS/2 port A is at 0092)		system control port for compatibility with 8255		 bit 7	(1= IRQ 0 reset )		 bit 6-4    reserved		 bit 3 = 1  channel check enable		 bit 2 = 1  parity check enable		 bit 1 = 1  speaker data enable		 bit 0 = 1  timer 2 gate to speaker enable0061	r	KB controller port B control register (ISA, EISA)		system control port for compatibility with 8255		 bit 7	 parity check occurred		 bit 6	 channel check occurred		 bit 5	 mirrors timer 2 output condition		 bit 4	 toggles with each refresh request		 bit 3	 channel check status		 bit 2	 parity check status		 bit 1	 speaker data status		 bit 0	 timer 2 gate to speaker status0061	w	PPI  Programmable Peripheral Interface 8255 (XT only)		system control port		 bit 7 = 1  clear keyboard		 bit 6 = 0  hold keyboard clock low		 bit 5 = 0  I/O check enable		 bit 4 = 0  RAM parity check enable		 bit 3 = 0  read low switches		 bit 2	    reserved, often used as turbo switch		 bit 1 = 1  speaker data enable		 bit 0 = 1  timer 2 gate to speaker enable0062	r/w	PPI (XT only)		 bit 7 = 1  RAM parity check		 bit 6 = 1  I/O channel check		 bit 5 = 1  timer 2 channel out		 bit 4	    reserved 		 bit 3 = 1  system board RAM size type 1		 bit 2 = 1  system board RAM size type 2		 bit 1 = 1  coprocessor installed		 bit 0 = 1  loop in POST0063	r/w	PPI (XT only) command mode register  (read dipswitches)		 bit 7-6 = 00  1 diskette drive			 = 01  2 diskette drives			 = 10  3 diskette drives			 = 11  4 diskette drives		 bit 5-4 = 00  reserved			 = 01  40*25 color (mono mode)			 = 10  80*25 color (mono mode)			 = 11  MDA 80*25		 bit 3-2 = 00  256K (using 256K chips)			 = 01  512K (using 256K chips)			 = 10  576K (using 256K chips)			 = 11  640K (using 256K chips)		 bit 3-2 = 00  64K  (using 64K chips)			 = 01  128K (using 64K chips)			 = 10  192K (using 64K chips)			 = 11  256K (using 64K chips)		 bit 1-0       reserved0064	r	KB controller read status (ISA, EISA)		 bit 7 = 1 parity error on transmission from keyboard		 bit 6 = 1 receive timeout		 bit 5 = 1 transmit timeout		 bit 4 = 0 keyboard inhibit		 bit 3 = 1 data in input register is command			 0 data in input register is data		 bit 2	 system flag status: 0=power up or reset  1=selftest OK		 bit 1 = 1 input buffer full (input 60/64 has data for 8042)		 bit 0 = 1 output buffer full (output 60 has data for system)0064	r	KB controller read status (MCA)		 bit 7 = 1 parity error on transmission from keyboard		 bit 6 = 1 general timeout		 bit 5 = 1 mouse output buffer full		 bit 4 = 0 keyboard inhibit		 bit 3 = 1 data in input register is command			 0 data in input register is data		 bit 2	 system flag status: 0=power up or reset  1=selftest OK		 bit 1 = 1 input buffer full (input 60/64 has data for 804x)		 bit 0 = 1 output buffer full (output 60 has data for system)0064	r	KB controller read status by Compaq		 bit 7 = 1 parity error detected (11-bit format only). If an			   error is detected, a Resend command is sent to the			   keyboard once only, as an attempt to recover.		 bit 6 = 1 receive timeout. transmission didn't finish in 2mS.		 bit 5 = 1 transmission timeout error			    bit 5,6,7  cause				1 0 0  No clock				1 1 0  Clock OK, no response				1 0 1  Clock OK, parity error		 bit 4 = 0 security lock engaged		 bit 3 = 1 data in OUTPUT register is command			 0 data in OUTPUT register is data		 bit 2	 system flag status: 0=power up or reset  1=soft reset		 bit 1 = 1 input buffer full (output 60/64 has data)		 bit 0 = 0 no new data in buffer (input 60 has data)0064	w	KB controller input buffer (ISA, EISA)		KB controller commands (data goes to port 0060):		 20	read  read byte zero of internal RAM, this is the			      last KB command send to 804x		      Compaq  Put current command byte on port 0060				command structure:				bit 7	reserved				bit 6 = 1 convert KB codes to 8086 scan codes				bit 5 = 0 use 11-bit codes, 1=use 8086 codes				bit 4 = 0 enable keyboard, 1=disable keyboard				bit 3 = 1 ignore security lock state				bit 2	  this bit goes into bit2 status reg.				bit 1 = 0 reserved				bit 0 = 1 generate int. when output buffer full		 21-3F	read  reads the byte specified in the lower 5 bits of			      the command in the 804x's internal RAM		 60-7F	dbl   writes the data byte to the address specified in			      the 5 lower bits of the command.			      Alternate description KB IO command 60 summary:			       bit7 = 0 reserved			       bit6 =	IBM PC compatibility mode			       bit5 =	IBM PC mode			       bit4 =	disable kb			       bit3 =	inhibit override			       bit2 =	system flag			       bit1 = 0 reserved			       bit0 =	enableoutput buffer full interrupt		 60   Compaq  Load new command (60 to [64], command to [60])		 A1   Compaq  unknown speedfunction ??		 A2   Compaq  unknown speedfunction ??		 A3   Compaq  Enable system speed control		 A4	MCA   check if password installed		 A4   Compaq  Toggle speed		 A5	MCA   load password		 A5   Compaq  Special reed. the 8042 places the real values			      of port 2 except for bits 4 and 5 wich are given			      a new definition in the output buffer. No output			      buffer full is generated.				if bit 5 = 0, a 9-bit keyboard is in use				if bit 5 = 1, an 11-bit keyboard is in use				if bit 4 = 0, outp-buff-full interrupt disabled				if bit 4 = 1, output-buffer-full int. enabled		 A6	MCA   check password		 A6   Compaq  unknown speedfunction ??		 A7	MCA   disable mouse port		 A8	MCA   enable mouse port		 A9	MCA   test mouse port		 AA	sngl  initiate self-test. will return 55 to data port		      Compaq  Initializes ports 1 and 2, disables the keyboard			      and clears the buffer pointers. It then places			      55 in the output buffer.		 AB	sngl  initiate interface test. result values:			       0 = no error			       1 = keyboard clock line stuck low			       2 = keyboard clock line stuck high			       3 = keyboard data line is stuck low			       4 = keyboard data line stuck high		      Compaq   5 = Compaq diagnostic feature		 AC	read  diagnostic dump. the contents of the 804x RAM,			      output port, input port, status word are send.		 AD	sngl  disable keyboard (sets bit 4 of commmand byte)		 AE	sngl  enable keyboard  (resets bit 4 of commmand byte)		 AF	AWARD Enhanced Command: read keyboard version		 C0	read  read input port		      Compaq  Places status of input port in output buffer. use			      this command only when the output buffer is empty		 C1	MCA   Enhanced Command: poll input port Low nibble		 C2	MCA   Enhanced Command: poll input port High nibble		 D0	read  read output port		      Compaq  Places byte in output port in output buffer. use			      this command only when the output buffer is empty		 D1	dbl   write output port. next byte written  to 0060			      will be written to the 804x output port; the			      original IBM AT and many compatibles use bit 1 of			      the output port to control the A20 gate.		      Compaq  The system speed bits are not set by this command			      use commands A1-A6 (!) for speed functions.		 D2	MCA   Enhanced Command: write keyboard output buffer		 D3	MCA   Enhanced Command: write pointing device out.buf.		 D4	MCA   write to mouse		 D4	AWARD Enhanced Command: write to auxiliary device		 DD	sngl  disable address line A20 (HP Vectra only???)			      default in Real Mode		 DF	sngl  enable address line A20 (HP Vectra only???)		 E0	read  read test inputs.				bit0 = kbd clock, bit1 = kbd data		 Exxx	AWARD Enhanced Command: active output port		 ED   Compaq  This is a two part command to control the state			      of the NumLock CpasLock and ScrollLock LEDs			      The second byte contains the state to set LEDs.				bit 7-3	   reserved. should be set to 0.				bit 2 = 0  Caps Lock LED off				bit 1 = 0  Num Lock LED off				bit 0 = 0  Scroll Lock LED off		 F0-FF	sngl  pulse output port low for 6 microseconds.			      bits 0-3 contain the mask for the bits to be			      pulsed. a bit is pulsed if its mask bit is zero.			      bit0=system reset. Don't set to zero. Pulse only!general note:	 Keyboard controllers are widely different from each other.		 You cannot generally exchange them between different machines.note on Award:	 Derived from Award's Enhanced KB controller advertising sheet.note on Compaq:	 Derived from the Compaq Deskpro 386 Tech. Ref. Guide.0065	r	communications port (Olivetti M24)0068	w	HP-Vectra  control buffer (HP commands)0069	r	HP-Vectra  SVC (keyboard request SerViCe port)006A	w	HP-Vectra  clear processing, done006C-006F	HP-HIL	(Human Interface Link = async. serial inputs 0-7)-------------------------------------------------------------------------------0065	  ----	AT&T 6300+ high/low chip select-------------------------------------------------------------------------------0065	  ----	???0065	r/w	???		bit 2: A20 gate control (set = A20 enabled, clear = disabled)-------------------------------------------------------------------------------0066-0067 ----	AT&T 6300+ system configuration switches-------------------------------------------------------------------------------0068	  ----	C&T chipsets, turbo mode control-------------------------------------------------------------------------------006B-006F ----	SSGA control registers006B	?	RAM enable/remap006C-006F	undocumented-------------------------------------------------------------------------------0070-007F ----	CMOS RAM/RTC (Real Time Clock  MC146818)0070	w	CMOS RAM index register port (ISA, EISA)		 bit 7	 = 1  NMI disabled			 = 0  NMI enabled		 bit 6-0      CMOS RAM index (64 bytes, sometimes 128 bytes)		any write to 0070 should be followed by an action to 0071		or the RTC wil be left in an unknown state.0071	r/w	CMOS RAM data port (ISA, EISA)		RTC registers:		00    current second in BCD		01    alarm second   in BCD		02    current minute in BCD		03    alarm minute   in BCD		04    current hour in BCD		05    alarm hour   in BCD		06    day of week  in BCD		07    day of month in BCD		08    month in BCD		09    year  in BCD (00-99)		0A    status register A		       bit 7 = 1  update in progress		       bit 6-4 divider that identifies the time-based				frequency		       bit 3-0 rate selection output  frequency and int. rate		0B    status register B		       bit 7 = 0  run			     = 1  halt		       bit 6 = 1  enable periodic interrupt		       bit 5 = 1  enable alarm interrupt		       bit 4 = 1  enable update-ended interrupt		       bit 3 = 1  enable square wave interrupt		       bit 2 = 1  calendar is in binary format			     = 0  calendar is in BCD format		       bit 1 = 1  24-hour mode			     = 0  12-hour mode		       bit 0 = 1  enable daylight savings time. only in USA.				  useless in Europe. Some DOS versions clear				  this bit when you use the DAT/TIME command.		0C    status register C		       bit 7 =	  interrupt request flag		       bit 6 =	  peridoc interrupt flag		       bit 5 =	  alarm interrupt flag		       bit 4 =	  update interrupt flag		       bit 3-0	  reserved		0D    status register D		       bit 7 = 1  Real-Time Clock has power		       bit 6-0	  reserved		0E    diagnostics status byte		       bit 7 = 0  RTC lost power		       bit 6 = 1  CMOS RAM checksum bad		       bit 5 = 1  invalid configuration information at POST		       bit 4 = 1  memory size error at POST		       bit 3 = 1  fixed disk/adapter failed initialization		       bit 2 = 1  CMOS RAM time found invalid		       bit 1 = 1  adapters do not match configuration (EISA)		       bit 0 = 1  time out reading an adapter ID (EISA)		0F    shutdown status byte		       00 = normal execution of POST		       01 = chip set initialization for real mode reentry		       04 = jump to bootstrap code		       05 = issue an EOI an JMP to Dword ptr at 40:67		       06 = JMP to Dword ptrv at 40:67 without EOI		       07 = return to INT15/87 (block move)		       08 = return to POST memory test		       09 = return to INT15/87 (block move)		       0A = JMP to Dword ptr at 40:67 without EOI		       0B = return IRETS through 40:67		10    diskette drive type for A: and B:		       bit 7-4	drive type of drive 0		       bit 3-0	drive type of drive 1			       = 0000	   no drive			       = 0001	   360K			       = 0010	   1M2			       = 0011	   720K			       = 0100	   1M44			       = 0101-1111 reserved		11    reserved / AMI Extended CMOS setup (AMI Hi-Flex BIOS)		       bit 7   = 1     Typematic Rate Programming		       bit 6-5 = 00    Typematic Rate Delay 250 mSec		       bit 4-0 = 00011 Typematic Rate 21.8 Chars/Sec		12    fixed disk drive type for drive 0 and drive 1		       bit 7-4	drive type of drive 0		       bit 3-0	drive type of drive 1				if either of the nibbles equals 0F, then bytes				19 an 1A are valid		13    reserved / AMI Extended CMOS setup (AMI Hi-Flex BIOS)		       bit 7 = 1  Mouse Support Option		       bit 6 = 1  Above 1 MB Memory Test disable		       bit 5 = 1  Memory Test Tick Sound disable		       bit 4 = 1  Memory Parity Error Check enable		       bit 3 = 1  Hit <ESC> Message Display disabled		       bit 2 = 1  Hard Disk Type 47 Data Area at address 0:300		       bit 1 = 1  Wait For <F1> If Any Error enabled		       bit 0 = 1  System Boot Up Num Lock is On		14    equipment byte		       bit 7-6	 diskette drives installed			       = 00  1 drive installed

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