lib0016.html

Memory Management—Algorithms and implementation in C/C++ Introduction Chapter 1 - Memory Manag

<p class="first-para">The best way to understand segmentation on Intel is to take a visual look at how it is implemented. A picture is worth 1,024 words, and that is particularly true in this case. So take a good, hard look at <a class="internaljump" href="#ch01fig09">Figure 1.9</a> and compare it to <a class="internaljump" href="#ch01fig08">Figure 1.8</a>. You might also want to bookmark <a class="internaljump" href="#ch01fig09">Figure 1.9</a> so that you can return to it when needed.</p>
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<a name="87"></a><a name="ch01fig09"></a><span class="figuremediaobject"><a href="images/fig47%5F01%5F0%2Ejpg" NAME="IMG_9" target="_parent"><img src="images/fig47_01.jpg" height="245" width="310" alt="Click To expand" border="0"></a></span>
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<span class="figure-title"><span class="figure-titlelabel">Figure 1.9</span></span>
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<p class="para">The first thing to note is that protected mode uses the full-blown set of Pentium registers displayed in <a href="LiB0014.html#61" target="_parent" class="chapterjump">Figure 1.2</a>. Back to 32-bit registers we go. Also, the segment registers no longer store 16-bit segment address values. Instead, it holds what is known as a <i class="emphasis">segment selector.</i>
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<p class="para">A segment selector is a 16-bit data structure containing three fields. Its composition is displayed in <a class="internaljump" href="#ch01fig10">Figure 1.10</a>. The really important field is the index field. The index field stores an index to a descriptor table. Index values start at zero.</p>
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<a name="88"></a><a name="ch01fig10"></a><span class="figuremediaobject"><img src="images/fig48_01.jpg" height="268" width="350" alt="" border="0"></span>
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<span class="figure-title"><span class="figure-titlelabel">Figure 1.10</span></span>
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<td valign="top" class="admon-check"></td><td valign="top" class="admon-title">Note&nbsp;</td><td valign="top" class="admon-body">
<p class="first-para">The index field in the segment selector is <i class="emphasis">not</i> an address. It is an index like the kind of index you would use to access an array element in C. The processor will take the index and internally do the necessary math to match the index to the linear address corresponding to that index. Note that I said <i class="emphasis">linear</i> address, not physical address. For the time being, linear and physical addresses are the same, but when paging is enabled, they are not. Keep this in mind.</p>
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<a name="89"></a><a name="IDX-20"></a>
<p class="para">A <i class="emphasis">descriptor table</i> is an array of entries in which each entry (known as a <i class="emphasis">segment descriptor</i>) describes the attributes of a specific memory segment. Included in a descriptor is the base address of the memory segment that it describes. The 32-bit offset address is added to the segment descriptor's base address in order to specify the address of a byte in memory.</p>
<p class="para">There are two types of descriptor tables: the <i class="emphasis">Global Descriptor Table</i> (GDT) and the <i class="emphasis">Local Descriptor Table</i> (LDT). Every operating system must have a GDT, but having one or more LDT structures is optional. Usually, if an LDT is to be used, it will be utilized to represent the memory segments belonging to a specific process. The base address of the GDT is stored in the GDTR system register. Likewise, the base address of the LDT is stored in the LDTR register. Naturally, there are special system instructions to load these registers (i.e., the LGDT and LLDT instructions).</p>
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<p class="first-para">Almost all of the operating systems this book examines focus on the GDT and offer very minimal use of the LDT (if they use it at all).</p>
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<p class="para">The GDTR is 48 bits in size. One unusual characteristic of the GDTR is that it stores two distinct values. The first 16 bits contain the size limit, in bytes, of the GDT. The next 32 bits store the base linear address of the GDT in physical memory. This is illustrated in <a class="internaljump" href="#ch01fig11">Figure 1.11</a>.</p>
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<a name="90"></a><a name="ch01fig11"></a><span class="figuremediaobject"><a href="images/fig48%5F02%5F0%2Ejpg" NAME="IMG_11" target="_parent"><img src="images/fig48_02.jpg" height="49" width="253" alt="Click To expand" border="0"></a></span>
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<span class="figure-title"><span class="figure-titlelabel">Figure 1.11</span></span>
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<a name="91"></a><a name="IDX-21"></a>
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<a name="LiB4"><b>1.&nbsp;</b></a>
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<p class="first-para">How does the processor map a segment selector's index to a descriptor?</p>
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<a href="#LiB3"><img src="images/question.gif" height="24" width="24" alt="The processor takes the index, specified by the segment selector, multiplies the index by eight (as in 8 bytes because descriptors are 64 bits in length), and then adds this product to the base address specified by GTDR or LDTR. " border="0"></a>
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<p class="bold">Answers</p>
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<a class="internaljump" name="answer.nr-qandaentry.717CCE8D-D671-4C8E-A25B-72E37B773F82" href="#LiB4"><b>1.</b></a>&nbsp;</p>
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<p class="first-para">The processor takes the index, specified by the segment selector, multiplies the index by eight (as in 8 bytes because descriptors are 64 bits in length), and then adds this product to the base address specified by GTDR or LDTR.</p>
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<td valign="top" class="admon-check"></td><td valign="top" class="admon-title">Note&nbsp;</td><td valign="top" class="admon-body">
<p class="first-para">In case you are looking at <a href="LiB0014.html#61" target="_parent" class="chapterjump">Figure 1.2</a> and wondering about the other two memory management registers, IDTR and TR, I did not forget them. They are not as crucial to this discussion as GDTR and LDTR. The IDTR and TR registers are used to manage hardware interrupts and multitasking. This book is focused on pure memory management, so I will not discuss these registers in any detail. If you happen to be interested, I recommend that you pick up the Intel manual referenced at the end of this chapter.</p>
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<p class="para">Earlier I mentioned that segment descriptors store the base linear address of the memory segment they describe. However, they also hold a whole lot of other metadata. <a class="internaljump" href="#ch01fig12">Figure 1.12</a> should give you a better idea of what lies within a segment descriptor. In this figure, I have broken the 64-bit descriptor into two 32-bit sections. The higher-order section is on top of the lower-order section.</p>
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<a name="92"></a><a name="ch01fig12"></a><span class="figuremediaobject"><a href="images/fig49%5F01%5F0%2Ejpg" NAME="IMG_12" target="_parent"><img src="images/fig49_01.jpg" height="218" width="310" alt="Click To expand" border="0"></a></span>
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<span class="figure-title"><span class="figure-titlelabel">Figure 1.12</span></span>
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<p class="para">There is a lot of information packed into those 64 bits. As you can see, several fields are broken up and stored in different parts of the <a name="93"></a><a name="IDX-22"></a>descriptor. There are two fields that might not be obvious just from looking at <a class="internaljump" href="#ch01fig11">Figure 1.11</a>. First is the SS flag, which indicates whether the segment is a <i class="emphasis">system segment</i> or just a normal code/data segment. A system segment, in case you are scratching your head, is a segment that is used to provide interrupt handling and multitasking services. I will not investigate either of those subjects.</p>
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<td valign="top" class="admon-check"></td><td valign="top" class="admon-title">Note&nbsp;</td><td valign="top" class="admon-body">
<p class="first-para">You will see a number of 1 -bit flags in the following few sections. For future reference, a bit is <i class="emphasis">set</i> when it is one. A bit is <i class="emphasis">cleared</i> when it is zero. Low-level operating system code is rife with bit-based manipulation. There is no way around it. Engineers who work with high-level languages tend to look down on engineers who write this type of low-level code. They are called <i class="emphasis">bit-bashers</i> or <i class="emphasis">bit-twiddlers.</i> Programmers can be cruel.</p>
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<p class="para">Assuming that the SS flag is set, the 4-bit type field in the descriptor describes the specific properties of the segment:</p>
<a name="94"></a><a name="ch01table01"></a>
<table class="table" border="1">
<caption class="table-title">
<span class="table-title"><span class="table-titlelabel">Table 1.1</span></span>
</caption>
<thead>
<tr valign="top">
<th class="th" scope="col" align="center" valign="top" colspan="4">
<p class="table-para">
<b class="bold">Bit</b>
</p>
</th><th class="th" scope="col" rowspan="2" align="left" valign="bottom">
<p class="table-para">
<b class="bold">Type</b>
</p>
</th><th class="th" scope="col" rowspan="2" align="left" valign="bottom">
<p class="table-para">
<b class="bold">Description</b>
</p>
</th>
</tr>
<tr valign="top">
<th class="th" scope="col" align="left">
<p class="table-para">
<b class="bold">11</b>
</p>
</th><th class="th" scope="col" align="left">
<p class="table-para">
<b class="bold">10</b>
</p>
</th><th class="th" scope="col" align="left">
<p class="table-para">
<b class="bold">9</b>
</p>
</th><th class="th" scope="col" align="left">
<p class="table-para">
<b class="bold">8</b>
</p>
</th>
</tr>
</thead>
<tbody>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">data</p>
</td><td class="td" align="left">
<p class="table-para">read-only</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">1</p>
</td><td class="td" align="left">
<p class="table-para">data</p>
</td><td class="td" align="left">
<p class="table-para">read-only, accessed</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">1</p>
</td><td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">data</p>
</td><td class="td" align="left">
<p class="table-para">read-write</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">1</p>
</td><td class="td" align="left">
<p class="table-para">1</p>
</td><td class="td" align="left">
<p class="table-para">data</p>
</td><td class="td" align="left">
<p class="table-para">read-write, accessed</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">1</p>
</td><td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">0</p>
</td><td class="td" align="left">
<p class="table-para">data</p>
</td><td class="td" align="left">
<p class="table-para">read-only, expand down</p>
</td>
</tr>