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<h2 class="first-section-title"><a name="70"></a><a name="ch01lev1sec4"></a>Intel Pentium Architecture</h2><a name="71"></a><a name="IDX-11"></a>
<p class="para">You have seen how a processor reads and writes bytes to memory. However, most processors also support two advanced memory management mechanisms: segmentation and paging.</p>
<p class="para">Segmentation is instituted by breaking up a computer's address space into specific regions, known as <i class="emphasis">segments.</i> Using segmentation is a way to isolate areas of memory so that programs cannot interfere with one another. Segmentation affords what is known as <i class="emphasis">memory protection.</i> It is possible to institute memory segmentation without protection, but there are really no advantages to such a scheme.</p>
<p class="para">Under a segmentation scheme that enforces memory protection, each application is assigned at least one segment. Large applications often have several segments. In addition, the operating system will also have its own custom set of segments. Segments are assigned a specific set of access writes so that policies can be created with regard to who can update what. Typically, the operating system code segments will execute with the highest privilege and applications will be loaded into segments with less authority.</p>
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<a name="72"></a><a name="ch01fig05"></a><span class="figuremediaobject"><a href="images/fig39%5F01%5F0%2Ejpg" NAME="IMG_5" target="_parent"><img src="images/fig39_01.jpg" height="189" width="240" alt="Click To expand" border="0"></a></span>
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<span class="figure-title"><span class="figure-titlelabel">Figure 1.5</span></span>
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<p class="para">Paging is a way to implement virtual memory. The physical memory provided by DRAM and disk storage, which is allocated to simulate DRAM, are merged together into one big amorphous collection of bytes. The total number of bytes that a processor is capable of addressing, if paging is enabled, is known as its <i class="emphasis">virtual address space.</i>
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<a name="73"></a><a name="IDX-12"></a>
<p class="para">The catch to all this is that the address of a byte in this artificial/virtual address space is no longer the same as the address that the processor places on the address bus. This means that translation data structures and code will have to be established in order to map a byte in the virtual address space to a physical byte (regardless of whether that byte happens to be in DRAM or on disk).</p>
<p class="para">When the necessary paging constructs have been activated, the virtual memory space is divided into smaller regions called <i class="emphasis">pages.</i> If the operating system decides that it is running low on physical memory, it will take pages that are currently stored in physical memory and write them to disk. If segmentation is being used, bookkeeping will have to be performed in order to match a given page of memory with the segment that owns it. All of the accounting work is done in close conjunction with the processor so that the performance hit associated with disk I/O can be kept to a minimum.</p>
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<a name="74"></a><a name="ch01fig06"></a><span class="figuremediaobject"><a href="images/fig40%5F01%5F0%2Ejpg" NAME="IMG_6" target="_parent"><img src="images/fig40_01.jpg" height="216" width="254" alt="Click To expand" border="0"></a></span>
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<span class="figure-title"><span class="figure-titlelabel">Figure 1.6</span></span>
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<p class="first-para">When pages of data are stored in physical memory (i.e., DRAM), they are placed in page-sized slots that are known as page frames. In addition to keeping track of individual pages, most operating systems also monitor page frame usage. The number of page frames is usually much smaller than the number of pages, so it is in the best interest of the operating system to carefully manage this precious commodity.</p>
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<td valign="top" class="admon-check"></td><td valign="top" class="admon-title">Note </td><td valign="top" class="admon-body">
<p class="first-para">It is possible to use paging without using disk space. But in this case, paging transforms into a hybrid form of segmentation that deals with 4KB regions of memory.</p>
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<a name="75"></a><a name="IDX-13"></a>
<p class="para">Because Intel's Pentium class of processors is easily accessible, I decided to use the Pentium to help illustrate segmentation and paging. I would love to demonstrate theory with a MIPS64 processor, but I can't afford an SGI server (sigh). Being inexpensive is one of the primary reasons for Intel's continued success. Hackers, like me, who couldn't afford an Apple IIe back in the 1980s were left scrounging for second-hand Intel boxes. There were thousands of people who had to make this kind of financial decision. So, in a sense, the proliferation of Intel into the workplace was somewhat of a grass roots movement.</p>
<p class="para">The Pentium class of processors is descended from a long line of popular CPUs:</p>
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<thead>
<tr valign="top">
<th class="th" scope="col" align="left" valign="middle">
<p class="table-para">CPU</p>
</th><th class="th" scope="col" align="center">
<p class="table-para">Release Date</p>
</th><th class="th" scope="col" align="center">
<p class="table-para">Physical Address Space</p>
</th>
</tr>
<tr>
<td colspan="3">
<hr>
</td>
</tr>
</thead>
<tbody>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">8086</p>
</td><td class="td" align="center">
<p class="table-para">1978</p>
</td><td class="td" align="center">
<p class="table-para">1MB</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">8088</p>
</td><td class="td" align="center">
<p class="table-para">1979</p>
</td><td class="td" align="center">
<p class="table-para">1MB</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">80286</p>
</td><td class="td" align="center">
<p class="table-para">1982</p>
</td><td class="td" align="center">
<p class="table-para">16MB</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">80386</p>
</td><td class="td" align="center">
<p class="table-para">1985</p>
</td><td class="td" align="center">
<p class="table-para">4GB</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">80486</p>
</td><td class="td" align="center">
<p class="table-para">1989</p>
</td><td class="td" align="center">
<p class="table-para">4GB</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">Pentium</p>
</td><td class="td" align="center">
<p class="table-para">1993</p>
</td><td class="td" align="center">
<p class="table-para">4GB</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">Pentium Pro</p>
</td><td class="td" align="center">
<p class="table-para">1995</p>
</td><td class="td" align="center">
<p class="table-para">64GB</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">Pentium II</p>
</td><td class="td" align="center">
<p class="table-para">1997</p>
</td><td class="td" align="center">
<p class="table-para">64GB</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">Pentium III</p>
</td><td class="td" align="center">
<p class="table-para">1999</p>
</td><td class="td" align="center">
<p class="table-para">64GB</p>
</td>
</tr>
<tr valign="top">
<td class="td" align="left">
<p class="table-para">Pentium 4</p>
</td><td class="td" align="center">
<p class="table-para">2000</p>
</td><td class="td" align="center">
<p class="table-para">64GB</p>
</td>
</tr>
</tbody>
</table>
</div>
<table border="0" cellspacing="0" cellpadding="0" class="note">
<tr>
<td valign="top" class="admon-check"></td><td valign="top" class="admon-title">Note </td><td valign="top" class="admon-body">
<p class="first-para">When the IBM PC came out in 1981, it shipped with a 4.77 MHz 8088. Without a doubt, mainframe developers were overjoyed. This was because the PC gave them a place of their own. In those days, the standard dummy terminals didn't do anything more than shuttle a data buffer back and forth to a mainframe. In addition, an engineer had little or no control over when, or how, his code would be run. The waiting could be agonizing. Tom Petty was right. Bribing a sysop with pizza could occasionally speed things up, but the full court grovel got tiring after a while. With an IBM PC, an engineer finally had a build machine that was open all night with no waiting.</p>
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<p class="first-para">I know one CDC engineer, in particular, who ported a FORTRAN '77 compiler to a PC in 1982 for this very reason. His supervisor would walk over and say: "Why do you want to run on that little three-wheeler instead of the production machine?" His answer: "Because it is mine, damn it." This one statement probably summarizes the mindset that made PCs wildly successful.</p>
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<a name="77"></a><a name="IDX-14"></a>
<p class="para">In an attempt to keep their old customers, Intel has gone to great lengths to make their 32-bit processors backward compatible with the previous 16-bit models. As testimony to Intel's success, I can boot my laptop with a DOS 6.22 boot disk and run most of my old DOS applications (including Doom and Duke Nukem).</p>
<p class="para">A product of the requirement for backward compatibility is that the Pentium chip operates in a number of different modes. Each mode dictates how the processor will interpret machine instructions and how it can access memory. Specifically, the Pentium is capable of operating in four modes:</p>
<ul class="itemizedlist">
<li class="first-listitem">
<p class="first-para">Real mode</p>
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<li class="listitem">
<p class="first-para">Protected mode</p>
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