ddc.m

用于数字下变频器的 FPGA 实现

%CIC滤波器设计
R_CIC = 40; % Decimation factor--CIC滤波器抽取因子
M    = 1;  % Differential delay--微分延迟，可为任何正整数，一般限制为1或2,SDR书上为M=1的情况
Nsecs= 5;  % Number of sections--CIC滤波器级数，级数越高，旁瓣抑制性能越好
IWL  = 14; % Input word length--输入字长
OWL  = 18; % Output word length--输出字长

% If the output wordlength is specified when creating a CIC filter then the
% "FilterInternals" property is set to "MinWordLengths" automatically.
% Therefore, the minimum word sizes are used between each section.
% hcic1 = mfilt.cicinterp(3,M,Nsecs,IWL,IWL);
% hcic2 = mfilt.cicdecim(R_CIC,M,Nsecs,IWL,OWL);

hcic = mfilt.cicdecim(R_CIC,M,Nsecs,IWL,OWL);
info(hcic)

% Fs_in =57.6e6;
Fs_in=10.0e6;
% hcic=mfilt.cascade(hcic1,hcic2);
h = fvtool(hcic,'Fs',Fs_in);
set(gcf, 'Color', 'blue');

%增益归一化，将幅频响应最大值变为0dB
hgain = dfilt.scalar(1/gain(hcic)); % Define gain
% hgain1=dfilt.scalar(1/gain(hcic1));
% hcicnorm1=cascade(hgain1,hcic1);
% hgain2=dfilt.scalar(1/gain(hcic2));
% hcicnorm2=cascade(hgain2,hcic2);
% hcicnorm=cascade(hcicnorm1,hcicnorm2);
hcicnorm = cascade(hgain,hcic);

% Replace the CIC in FVTool with a normalized CIC.
% h=fvtool(hcicnorm,'Fs',Fs_in);
% set(gcf,'Color','blue');
setfilter(h,hcicnorm,'Fs',Fs_in);
axis([0 0.2 -0.8 0]);

%CIC补偿滤波器设计
%Compensation FIR Decimator
% Filter specifications
Fs_hcfir = Fs_in/R_CIC; % Sampling frequency 57.6MHz/20--CIC补偿滤波器输入采样速率
Apass  = 0.01;     % dB  --通带截止频率处衰减值
Astop  = 60;       % dB  --阻带截止频率处衰减值
Aslope = 60;       % 60 dB slope over half the Nyquist range
Fpass  = 80e3;    % Hz passband-edge frequency  --通带截止频率
Fstop  = 640e3;    % Hz stopband-edge frequency  --阻带截止频率，值越大，所要求的滤波器阶数越少

% Design decimation filter. D and Nsecs have been defined above as the
% differential delay and number of sections, respectively.
% 补偿滤波器设计，抽取因子=2
d = fdesign.decimator(2,'ciccomp',M,Nsecs,Fpass,Fstop,Apass,Astop,Fs_hcfir);
hcfir = design(d,'equiripple',...
               'StopbandShape', 'linear',...
               'StopbandDecay', Aslope);

% Now we have to define the fixed-point attributes of our multirate filter.
% By default, the fixed-point attributes of the accumulator and multipliers
% are set to ensure that full precision arithmetic is used, i.e. no
% quantization takes place.
set(hcfir,...
    'Arithmetic',      'fixed',...
    'CoeffWordLength',  16,...
    'InputWordLength',  16);
info(hcfir)

hcas1 = cascade(hcicnorm,hcfir);
set(h,'Filters', [hcicnorm,hcfir,hcas1],'Fs',[Fs_in,Fs_in/R_CIC,Fs_in]);
axis([0 0.12 -0.8 0.8]);  %查看补偿后的效果
legend(h,'hcic','hcfir','cascade');

%最后一级FIR滤波器设计，抽取因子=2（通过fvtool可查看所设计滤波器的系数）
%Third Stage FIR Decimator
N = 141;       % 63 taps  ，FIR滤波器阶数
Fs_fir = Fs_hcfir/2;  % FIR滤波器输入采样速率
Fpass = 80e3;         % 通带截止频率
Fstop = 100e3;        % 阻带截止频率

% FIR滤波器设计，抽取因子=2
d = fdesign.decimator(1,'lowpass','N,Fp,Fst',N,Fpass,Fstop,Fs_fir);
hpfir = design(d,'equiripple','Wpass',2);  % Give more weight to passband
set(hpfir,...
    'Arithmetic',      'fixed',...
    'CoeffWordLength',  16,...
    'InputWordLength',  20,...
    'InputFracLength', -12);
set(hpfir,...
    'FilterInternals', 'specifyPrecision',...
    'outputWordLength', 20,...
    'outputFracLength',-12,...
    'RoundMode',       'round',... % = nearest in SL
    'OverflowMode',    'Saturate');
hcasnorm = cascade(hcicnorm,hcfir,hpfir);
set(h,'Filters',hcasnorm,'Fs',Fs_in,'NumberofPoints',8192*3);
axis([0 1 -200 10]);  % Zoom-in
axis([0 0.1 -0.2 0.2]);
% axis([0 0.1 -0.2 11]);

%取出滤波器系数
hpfir_coef=get(hpfir,'Numerator');
hpfir_N=16;
max_coef=max(abs(hpfir_coef));
hpfir_coef=hpfir_coef/max_coef;
hpfir_coef=round(hpfir_coef* 2^(hpfir_N-1)-1);
input_width=16;
output_width=input_width+ceil(log2(sum(abs(hpfir_coef))))


%取出滤波器系数
hcfir_coef=get(hcfir,'Numerator');
hcfir_N=16;
max_coef=max(abs(hcfir_coef));
hcfir_coef=hcfir_coef/max_coef;
hcfir_coef=round(hcfir_coef* 2^(hcfir_N-1)-1);
input_width=16;
output_width=input_width+ceil(log2(sum(abs(hcfir_coef))))