ps7_instance.mhs

自学ZedBoard：使用IP通过ARM PS访问FPGA（源代码）

 PORT S_AXI_GP1_RREADY = ps7_axi_interconnect_0_S_AXI_GP1_RREADY
 PORT S_AXI_GP1_RDATA = ps7_axi_interconnect_0_S_AXI_GP1_RDATA
 PORT S_AXI_GP1_WLAST = ps7_axi_interconnect_0_S_AXI_GP1_WLAST
 PORT S_AXI_GP1_BID = ps7_axi_interconnect_0_S_AXI_GP1_BID
 PORT S_AXI_GP0_AWREADY = ps7_axi_interconnect_0_S_AXI_GP0_AWREADY
 PORT S_AXI_GP0_BRESP = ps7_axi_interconnect_0_S_AXI_GP0_BRESP
 PORT S_AXI_GP0_ARREADY = ps7_axi_interconnect_0_S_AXI_GP0_ARREADY
 PORT S_AXI_GP1_BRESP = ps7_axi_interconnect_0_S_AXI_GP1_BRESP
 PORT S_AXI_GP1_RLAST = ps7_axi_interconnect_0_S_AXI_GP1_RLAST
 PORT S_AXI_GP0_RVALID = ps7_axi_interconnect_0_S_AXI_GP0_RVALID
 PORT S_AXI_GP0_RRESP = ps7_axi_interconnect_0_S_AXI_GP0_RRESP
 PORT S_AXI_GP0_AWVALID = ps7_axi_interconnect_0_S_AXI_GP0_AWVALID
 PORT S_AXI_GP0_RREADY = ps7_axi_interconnect_0_S_AXI_GP0_RREADY
 PORT S_AXI_GP0_RDATA = ps7_axi_interconnect_0_S_AXI_GP0_RDATA
 PORT S_AXI_GP0_WLAST = ps7_axi_interconnect_0_S_AXI_GP0_WLAST
 PORT S_AXI_GP0_BID = ps7_axi_interconnect_0_S_AXI_GP0_BID
 PORT S_AXI_GP0_RID = ps7_axi_interconnect_0_S_AXI_GP0_RID
 PORT S_AXI_GP0_ACLK = ps7_axi_interconnect_0_S_AXI_GP0_ACLK
 PORT S_AXI_GP0_ARVALID = ps7_axi_interconnect_0_S_AXI_GP0_ARVALID
 PORT S_AXI_GP0_BREADY = ps7_axi_interconnect_0_S_AXI_GP0_BREADY
 PORT S_AXI_GP0_WVALID = ps7_axi_interconnect_0_S_AXI_GP0_WVALID
 PORT S_AXI_GP0_ARSIZE = ps7_axi_interconnect_0_S_AXI_GP0_ARSIZE
 PORT S_AXI_GP0_AWLEN = ps7_axi_interconnect_0_S_AXI_GP0_AWLEN
 PORT S_AXI_GP1_AWREADY = ps7_axi_interconnect_0_S_AXI_GP1_AWREADY
 PORT S_AXI_GP0_ARBURST = ps7_axi_interconnect_0_S_AXI_GP0_ARBURST
 PORT S_AXI_GP0_ARLOCK = ps7_axi_interconnect_0_S_AXI_GP0_ARLOCK
 PORT S_AXI_HP2_AWSIZE = ps7_axi_interconnect_0_S_AXI_HP2_AWSIZE
 PORT S_AXI_HP2_ARPROT = ps7_axi_interconnect_0_S_AXI_HP2_ARPROT
 PORT S_AXI_HP2_AWPROT = ps7_axi_interconnect_0_S_AXI_HP2_AWPROT
 PORT S_AXI_HP2_ARADDR = ps7_axi_interconnect_0_S_AXI_HP2_ARADDR
 PORT S_AXI_HP2_AWADDR = ps7_axi_interconnect_0_S_AXI_HP2_AWADDR
 PORT S_AXI_HP2_ARCACHE = ps7_axi_interconnect_0_S_AXI_HP2_ARCACHE
 PORT S_AXI_HP2_ARLEN = ps7_axi_interconnect_0_S_AXI_HP2_ARLEN
 PORT S_AXI_HP2_ARQOS = ps7_axi_interconnect_0_S_AXI_HP2_ARQOS
 PORT S_AXI_HP2_AWCACHE = ps7_axi_interconnect_0_S_AXI_HP2_AWCACHE
 PORT S_AXI_HP3_BRESP = ps7_axi_interconnect_0_S_AXI_HP3_BRESP
 PORT S_AXI_HP2_AWQOS = ps7_axi_interconnect_0_S_AXI_HP2_AWQOS
 PORT S_AXI_HP2_AWLEN = ps7_axi_interconnect_0_S_AXI_HP2_AWLEN
 PORT S_AXI_HP2_ARID = ps7_axi_interconnect_0_S_AXI_HP2_ARID
 PORT S_AXI_HP3_BVALID = ps7_axi_interconnect_0_S_AXI_HP3_BVALID
 PORT S_AXI_HP2_AWID = ps7_axi_interconnect_0_S_AXI_HP2_AWID
 PORT S_AXI_HP2_WID = ps7_axi_interconnect_0_S_AXI_HP2_WID
 PORT S_AXI_HP2_WDATA = ps7_axi_interconnect_0_S_AXI_HP2_WDATA
 PORT S_AXI_HP2_WSTRB = ps7_axi_interconnect_0_S_AXI_HP2_WSTRB
 PORT S_AXI_ACP_RLAST = ps7_axi_interconnect_0_S_AXI_ACP_RLAST
 PORT S_AXI_ACP_ARREADY = ps7_axi_interconnect_0_S_AXI_ACP_ARREADY
 PORT S_AXI_HP3_RVALID = ps7_axi_interconnect_0_S_AXI_HP3_RVALID
 PORT S_AXI_HP3_RRESP = ps7_axi_interconnect_0_S_AXI_HP3_RRESP
 PORT S_AXI_HP3_AWVALID = ps7_axi_interconnect_0_S_AXI_HP3_AWVALID
 PORT S_AXI_HP3_RREADY = ps7_axi_interconnect_0_S_AXI_HP3_RREADY
 PORT S_AXI_HP3_BID = ps7_axi_interconnect_0_S_AXI_HP3_BID
 PORT S_AXI_HP3_WLAST = ps7_axi_interconnect_0_S_AXI_HP3_WLAST
 PORT S_AXI_HP3_RID = ps7_axi_interconnect_0_S_AXI_HP3_RID
 PORT S_AXI_HP3_RDATA = ps7_axi_interconnect_0_S_AXI_HP3_RDATA
 PORT S_AXI_HP3_ACLK = ps7_axi_interconnect_0_S_AXI_HP3_ACLK
 PORT S_AXI_HP3_ARVALID = ps7_axi_interconnect_0_S_AXI_HP3_ARVALID
 PORT S_AXI_HP3_BREADY = ps7_axi_interconnect_0_S_AXI_HP3_BREADY
 PORT S_AXI_HP3_WVALID = ps7_axi_interconnect_0_S_AXI_HP3_WVALID
 PORT S_AXI_HP3_ARSIZE = ps7_axi_interconnect_0_S_AXI_HP3_ARSIZE
 PORT S_AXI_HP3_ARBURST = ps7_axi_interconnect_0_S_AXI_HP3_ARBURST
 PORT S_AXI_ACP_AWREADY = ps7_axi_interconnect_0_S_AXI_ACP_AWREADY
 PORT S_AXI_HP3_ARLOCK = ps7_axi_interconnect_0_S_AXI_HP3_ARLOCK
 PORT S_AXI_HP3_AWBURST = ps7_axi_interconnect_0_S_AXI_HP3_AWBURST
 PORT S_AXI_HP3_AWLOCK = ps7_axi_interconnect_0_S_AXI_HP3_AWLOCK
 PORT S_AXI_HP3_AWSIZE = ps7_axi_interconnect_0_S_AXI_HP3_AWSIZE
 PORT S_AXI_HP3_ARPROT = ps7_axi_interconnect_0_S_AXI_HP3_ARPROT
 PORT S_AXI_HP3_AWPROT = ps7_axi_interconnect_0_S_AXI_HP3_AWPROT
 PORT S_AXI_HP3_ARADDR = ps7_axi_interconnect_0_S_AXI_HP3_ARADDR
 PORT S_AXI_HP3_AWADDR = ps7_axi_interconnect_0_S_AXI_HP3_AWADDR
 PORT S_AXI_HP3_ARCACHE = ps7_axi_interconnect_0_S_AXI_HP3_ARCACHE
 PORT S_AXI_HP3_ARLEN = ps7_axi_interconnect_0_S_AXI_HP3_ARLEN
 PORT S_AXI_HP3_ARQOS = ps7_axi_interconnect_0_S_AXI_HP3_ARQOS
 PORT S_AXI_HP3_AWCACHE = ps7_axi_interconnect_0_S_AXI_HP3_AWCACHE
 PORT S_AXI_ACP_BRESP = ps7_axi_interconnect_0_S_AXI_ACP_BRESP
 PORT S_AXI_HP3_AWQOS = ps7_axi_interconnect_0_S_AXI_HP3_AWQOS
 PORT S_AXI_HP3_AWLEN = ps7_axi_interconnect_0_S_AXI_HP3_AWLEN
 PORT S_AXI_HP3_ARID = ps7_axi_interconnect_0_S_AXI_HP3_ARID
 PORT S_AXI_ACP_BVALID = ps7_axi_interconnect_0_S_AXI_ACP_BVALID
 PORT S_AXI_HP3_AWID = ps7_axi_interconnect_0_S_AXI_HP3_AWID
 PORT S_AXI_HP3_WID = ps7_axi_interconnect_0_S_AXI_HP3_WID
 PORT S_AXI_HP3_WDATA = ps7_axi_interconnect_0_S_AXI_HP3_WDATA
 PORT S_AXI_HP3_WSTRB = ps7_axi_interconnect_0_S_AXI_HP3_WSTRB
 PORT S_AXI_ACP_RVALID = ps7_axi_interconnect_0_S_AXI_ACP_RVALID
 PORT S_AXI_ACP_WLAST = ps7_axi_interconnect_0_S_AXI_ACP_WLAST
 PORT S_AXI_ACP_RRESP = ps7_axi_interconnect_0_S_AXI_ACP_RRESP
 PORT S_AXI_ACP_BID = ps7_axi_interconnect_0_S_AXI_ACP_BID
 PORT S_AXI_ACP_AWVALID = ps7_axi_interconnect_0_S_AXI_ACP_AWVALID
 PORT S_AXI_HP1_AWCACHE = ps7_axi_interconnect_0_S_AXI_HP1_AWCACHE
 PORT S_AXI_HP2_BRESP = ps7_axi_interconnect_0_S_AXI_HP2_BRESP
 PORT S_AXI_HP1_AWQOS = ps7_axi_interconnect_0_S_AXI_HP1_AWQOS
 PORT S_AXI_HP1_AWLEN = ps7_axi_interconnect_0_S_AXI_HP1_AWLEN
 PORT S_AXI_HP1_ARID = ps7_axi_interconnect_0_S_AXI_HP1_ARID
 PORT S_AXI_HP2_BVALID = ps7_axi_interconnect_0_S_AXI_HP2_BVALID
 PORT S_AXI_HP1_AWID = ps7_axi_interconnect_0_S_AXI_HP1_AWID
 PORT S_AXI_HP1_WID = ps7_axi_interconnect_0_S_AXI_HP1_WID
 PORT S_AXI_HP1_WDATA = ps7_axi_interconnect_0_S_AXI_HP1_WDATA
 PORT S_AXI_HP1_WSTRB = ps7_axi_interconnect_0_S_AXI_HP1_WSTRB
 PORT S_AXI_HP3_RLAST = ps7_axi_interconnect_0_S_AXI_HP3_RLAST
 PORT S_AXI_HP3_AWREADY = ps7_axi_interconnect_0_S_AXI_HP3_AWREADY
 PORT S_AXI_HP2_RVALID = ps7_axi_interconnect_0_S_AXI_HP2_RVALID
 PORT S_AXI_HP2_RRESP = ps7_axi_interconnect_0_S_AXI_HP2_RRESP
 PORT S_AXI_HP2_AWVALID = ps7_axi_interconnect_0_S_AXI_HP2_AWVALID
 PORT S_AXI_HP2_RREADY = ps7_axi_interconnect_0_S_AXI_HP2_RREADY
 PORT S_AXI_HP2_BID = ps7_axi_interconnect_0_S_AXI_HP2_BID
 PORT S_AXI_HP2_WLAST = ps7_axi_interconnect_0_S_AXI_HP2_WLAST
 PORT S_AXI_HP2_RID = ps7_axi_interconnect_0_S_AXI_HP2_RID
 PORT S_AXI_HP2_RDATA = ps7_axi_interconnect_0_S_AXI_HP2_RDATA
 PORT S_AXI_HP2_ACLK = ps7_axi_interconnect_0_S_AXI_HP2_ACLK
 PORT S_AXI_HP2_ARVALID = ps7_axi_interconnect_0_S_AXI_HP2_ARVALID
 PORT S_AXI_HP2_BREADY = ps7_axi_interconnect_0_S_AXI_HP2_BREADY
 PORT S_AXI_HP2_WVALID = ps7_axi_interconnect_0_S_AXI_HP2_WVALID
 PORT S_AXI_HP2_ARSIZE = ps7_axi_interconnect_0_S_AXI_HP2_ARSIZE
 PORT S_AXI_HP2_ARBURST = ps7_axi_interconnect_0_S_AXI_HP2_ARBURST
 PORT S_AXI_HP3_ARREADY = ps7_axi_interconnect_0_S_AXI_HP3_ARREADY
 PORT S_AXI_HP2_ARLOCK = ps7_axi_interconnect_0_S_AXI_HP2_ARLOCK
 PORT S_AXI_HP2_AWBURST = ps7_axi_interconnect_0_S_AXI_HP2_AWBURST
 PORT S_AXI_HP2_AWLOCK = ps7_axi_interconnect_0_S_AXI_HP2_AWLOCK
 PORT S_AXI_HP0_RRESP = ps7_axi_interconnect_0_S_AXI_HP0_RRESP
 PORT S_AXI_HP0_AWVALID = ps7_axi_interconnect_0_S_AXI_HP0_AWVALID
 PORT S_AXI_HP0_RREADY = ps7_axi_interconnect_0_S_AXI_HP0_RREADY
 PORT S_AXI_HP0_BID = ps7_axi_interconnect_0_S_AXI_HP0_BID
 PORT S_AXI_HP0_WLAST = ps7_axi_interconnect_0_S_AXI_HP0_WLAST
 PORT S_AXI_HP0_RID = ps7_axi_interconnect_0_S_AXI_HP0_RID
 PORT S_AXI_HP0_RDATA = ps7_axi_interconnect_0_S_AXI_HP0_RDATA
 PORT S_AXI_HP0_ACLK = ps7_axi_interconnect_0_S_AXI_HP0_ACLK
 PORT S_AXI_HP0_ARVALID = ps7_axi_interconnect_0_S_AXI_HP0_ARVALID
 PORT S_AXI_HP0_BREADY = ps7_axi_interconnect_0_S_AXI_HP0_BREADY
 PORT S_AXI_HP0_WVALID = ps7_axi_interconnect_0_S_AXI_HP0_WVALID
 PORT S_AXI_HP0_ARSIZE = ps7_axi_interconnect_0_S_AXI_HP0_ARSIZE
 PORT S_AXI_HP0_ARBURST = ps7_axi_interconnect_0_S_AXI_HP0_ARBURST
 PORT S_AXI_HP1_ARREADY = ps7_axi_interconnect_0_S_AXI_HP1_ARREADY
 PORT S_AXI_HP0_ARLOCK = ps7_axi_interconnect_0_S_AXI_HP0_ARLOCK
 PORT S_AXI_HP0_AWBURST = ps7_axi_interconnect_0_S_AXI_HP0_AWBURST
 PORT S_AXI_HP0_AWLOCK = ps7_axi_interconnect_0_S_AXI_HP0_AWLOCK
 PORT S_AXI_HP0_AWSIZE = ps7_axi_interconnect_0_S_AXI_HP0_AWSIZE
 PORT S_AXI_HP0_ARPROT = ps7_axi_interconnect_0_S_AXI_HP0_ARPROT
 PORT S_AXI_HP0_AWPROT = ps7_axi_interconnect_0_S_AXI_HP0_AWPROT
 PORT S_AXI_HP0_ARADDR = ps7_axi_interconnect_0_S_AXI_HP0_ARADDR
 PORT S_AXI_HP0_AWADDR = ps7_axi_interconnect_0_S_AXI_HP0_AWADDR
 PORT S_AXI_HP0_ARCACHE = ps7_axi_interconnect_0_S_AXI_HP0_ARCACHE
 PORT S_AXI_HP0_ARLEN = ps7_axi_interconnect_0_S_AXI_HP0_ARLEN
 PORT S_AXI_HP0_ARQOS = ps7_axi_interconnect_0_S_AXI_HP0_ARQOS
 PORT S_AXI_HP0_AWCACHE = ps7_axi_interconnect_0_S_AXI_HP0_AWCACHE
 PORT S_AXI_HP1_BRESP = ps7_axi_interconnect_0_S_AXI_HP1_BRESP
 PORT S_AXI_HP0_AWQOS = ps7_axi_interconnect_0_S_AXI_HP0_AWQOS
 PORT S_AXI_HP0_AWLEN = ps7_axi_interconnect_0_S_AXI_HP0_AWLEN
 PORT S_AXI_HP0_ARID = ps7_axi_interconnect_0_S_AXI_HP0_ARID
 PORT S_AXI_HP1_BVALID = ps7_axi_interconnect_0_S_AXI_HP1_BVALID
 PORT S_AXI_GP0_WREADY = ps7_axi_interconnect_0_S_AXI_GP0_WREADY
 PORT M_AXI_GP0_ARESETN = ps7_axi_interconnect_0_M_AXI_GP0_ARESETN
 PORT S_AXI_HP0_WRISSUECAP1_EN = ps7_axi_interconnect_0_S_AXI_HP0_WRISSUECAP1_EN
 PORT S_AXI_GP1_ARESETN = ps7_axi_interconnect_0_S_AXI_GP1_ARESETN
 PORT S_AXI_GP0_ARESETN = ps7_axi_interconnect_0_S_AXI_GP0_ARESETN
 PORT S_AXI_ACP_ARESETN = ps7_axi_interconnect_0_S_AXI_ACP_ARESETN
 PORT S_AXI_HP0_ARESETN = ps7_axi_interconnect_0_S_AXI_HP0_ARESETN
 PORT S_AXI_HP0_RCOUNT = ps7_axi_interconnect_0_S_AXI_HP0_RCOUNT
 PORT S_AXI_HP0_WCOUNT = ps7_axi_interconnect_0_S_AXI_HP0_WCOUNT
 PORT S_AXI_HP0_RACOUNT = ps7_axi_interconnect_0_S_AXI_HP0_RACOUNT
 PORT S_AXI_HP0_WACOUNT = ps7_axi_interconnect_0_S_AXI_HP0_WACOUNT
 PORT S_AXI_HP0_RDISSUECAP1_EN = ps7_axi_interconnect_0_S_AXI_HP0_RDISSUECAP1_EN
 PORT S_AXI_HP1_ARESETN = ps7_axi_interconnect_0_S_AXI_HP1_ARESETN
 PORT S_AXI_HP1_WRISSUECAP1_EN = ps7_axi_interconnect_0_S_AXI_HP1_WRISSUECAP1_EN
 PORT S_AXI_HP1_RCOUNT = ps7_axi_interconnect_0_S_AXI_HP1_RCOUNT
 PORT S_AXI_HP1_WCOUNT = ps7_axi_interconnect_0_S_AXI_HP1_WCOUNT
 PORT S_AXI_HP1_RACOUNT = ps7_axi_interconnect_0_S_AXI_HP1_RACOUNT
 PORT S_AXI_HP1_WACOUNT = ps7_axi_interconnect_0_S_AXI_HP1_WACOUNT
 PORT S_AXI_HP1_RDISSUECAP1_EN = ps7_axi_interconnect_0_S_AXI_HP1_RDISSUECAP1_EN
 PORT S_AXI_HP2_ARESETN = ps7_axi_interconnect_0_S_AXI_HP2_ARESETN
 PORT S_AXI_HP2_WRISSUECAP1_EN = ps7_axi_interconnect_0_S_AXI_HP2_WRISSUECAP1_EN
 PORT S_AXI_HP2_RCOUNT = ps7_axi_interconnect_0_S_AXI_HP2_RCOUNT
 PORT S_AXI_HP2_WCOUNT = ps7_axi_interconnect_0_S_AXI_HP2_WCOUNT
 PORT S_AXI_HP2_RACOUNT = ps7_axi_interconnect_0_S_AXI_HP2_RACOUNT
 PORT S_AXI_HP2_WACOUNT = ps7_axi_interconnect_0_S_AXI_HP2_WACOUNT
 PORT S_AXI_HP2_RDISSUECAP1_EN = ps7_axi_interconnect_0_S_AXI_HP2_RDISSUECAP1_EN
 PORT S_AXI_HP3_ARESETN = ps7_axi_interconnect_0_S_AXI_HP3_ARESETN
 PORT S_AXI_HP3_WRISSUECAP1_EN = ps7_axi_interconnect_0_S_AXI_HP3_WRISSUECAP1_EN
 PORT S_AXI_HP3_RCOUNT = ps7_axi_interconnect_0_S_AXI_HP3_RCOUNT
 PORT S_AXI_HP3_WCOUNT = ps7_axi_interconnect_0_S_AXI_HP3_WCOUNT
 PORT S_AXI_HP3_RACOUNT = ps7_axi_interconnect_0_S_AXI_HP3_RACOUNT
 PORT S_AXI_HP3_WACOUNT = ps7_axi_interconnect_0_S_AXI_HP3_WACOUNT
 PORT S_AXI_HP3_RDISSUECAP1_EN = ps7_axi_interconnect_0_S_AXI_HP3_RDISSUECAP1_EN
 PORT M_AXI_GP1_ARESETN = ps7_axi_interconnect_0_M_AXI_GP1_ARESETN
END








BEGIN ps7_uart
 PARAMETER INSTANCE = ps7_uart_1
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_INTERCONNECT_S_AXI_MASTERS = ps7_cortexa9_0.M_AXI_DP & ps7_cortexa9_1.M_AXI_DP
 BUS_INTERFACE S_AXI = ps7_axi_interconnect_0
 PARAMETER C_S_AXI_BASEADDR = 0xE0001000
 PARAMETER C_S_AXI_HIGHADDR = 0xE0001FFF
 PARAMETER C_UART_CLK_FREQ_HZ = 50000000
 PARAMETER C_HAS_MODEM = 0
END



BEGIN ps7_i2c
 PARAMETER INSTANCE = ps7_i2c_0
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_INTERCONNECT_S_AXI_MASTERS = ps7_cortexa9_0.M_AXI_DP & ps7_cortexa9_1.M_AXI_DP
 BUS_INTERFACE S_AXI = ps7_axi_interconnect_0
 PARAMETER C_S_AXI_BASEADDR = 0xE0004000 
 PARAMETER C_S_AXI_HIGHADDR = 0xE0004FFF
 PARAMETER C_I2C_CLK_FREQ_HZ = 111111115