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📄 xwdtps.c

📁 自学ZedBoard:使用IP通过ARM PS访问FPGA(源代码)
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	Register = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,				 XWDTPS_ZMR_OFFSET);	/*	 * Zero the field in the register.	 */	Register &= ~XWDTPS_ZMR_EXLN_MASK;	/*	 * Shift Value over to the proper positions.	 */	Length = Length << XWDTPS_ZMR_EXLN_SHIFT;	Register |= Length;	/*	 * Set the access key so the write takes.	 */	Register |= XWDTPS_ZMR_ZKEY_VAL;	/*	 * Update the ZMR with the new value.	 */	XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_ZMR_OFFSET,			  Register);}/****************************************************************************//**** Enables the indicated signal/output.* Performs a read/modify/write cycle to update the value correctly.** @param	InstancePtr is a pointer to the XWdtPs instance.* @param	Signal is the desired signal/output.*		Valid Signal Values are XWDTPS_RESET_SIGNAL,*		XWDTPS_IRQ_SIGNAL and XWDTPS_EXTERNAL_SIGNAL.*		Only one of them can be specified at a time.** @return	None.** @note		None.*******************************************************************************/void XWdtPs_EnableOutput(XWdtPs *InstancePtr, u8 Signal){	u32 Register = 0;	Xil_AssertVoid(InstancePtr != NULL);	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);	Xil_AssertVoid((Signal == XWDTPS_RESET_SIGNAL) ||			(Signal == XWDTPS_IRQ_SIGNAL) ||			(Signal == XWDTPS_EXTERNAL_SIGNAL));	/*	 * Read the contents of the ZMR register.	 */	Register = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,				 XWDTPS_ZMR_OFFSET);	if (Signal == XWDTPS_RESET_SIGNAL) {		/*		 * Enable the field in the register.		 */		Register |= XWDTPS_ZMR_RSTEN_MASK;	} else if (Signal == XWDTPS_IRQ_SIGNAL) {		/*		 * Enable the field in the register.		 */		Register |= XWDTPS_ZMR_IRQEN_MASK;	} else if (Signal == XWDTPS_EXTERNAL_SIGNAL) {		/*		 * Enable the field in the register.		 */		Register |= XWDTPS_ZMR_EXTEN_MASK;	}	/*	 * Set the access key so the write takes.	 */	Register |= XWDTPS_ZMR_ZKEY_VAL;	/*	 * Update the ZMR with the new value.	 */	XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_ZMR_OFFSET,			  Register);}/****************************************************************************//**** Disables the indicated signal/output.* Performs a read/modify/write cycle to update the value correctly.** @param	InstancePtr is a pointer to the XWdtPs instance.* @param	Signal is the desired signal/output.*		Valid Signal Values are XWDTPS_RESET_SIGNAL,*		XWDTPS_IRQ_SIGNAL AND XWDTPS_EXTERNAL_SIGNAL.*		Only one of them can be specified at a time.** @return	None.** @note		None.*******************************************************************************/void XWdtPs_DisableOutput(XWdtPs *InstancePtr, u8 Signal){	u32 Register = 0;	Xil_AssertVoid(InstancePtr != NULL);	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);	Xil_AssertVoid((Signal == XWDTPS_RESET_SIGNAL) ||			(Signal == XWDTPS_IRQ_SIGNAL) ||			(Signal == XWDTPS_EXTERNAL_SIGNAL));	/*	 * Read the contents of the ZMR register.	 */	Register = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,				 XWDTPS_ZMR_OFFSET);	if (Signal == XWDTPS_RESET_SIGNAL) {		/*		 * Disable the field in the register.		 */		Register &= ~XWDTPS_ZMR_RSTEN_MASK;	} else if (Signal == XWDTPS_IRQ_SIGNAL) {		/*		 * Disable the field in the register.		 */		Register &= ~XWDTPS_ZMR_IRQEN_MASK;	} else if (Signal == XWDTPS_EXTERNAL_SIGNAL) {		/*		 * Disable the field in the register.		 */		Register &= ~XWDTPS_ZMR_EXTEN_MASK;	}	/*	 * Set the access key so the write takes place.	 */	Register |= XWDTPS_ZMR_ZKEY_VAL;	/*	 * Update the ZMR with the new value.	 */	XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_ZMR_OFFSET,			  Register);}/****************************************************************************//**** Returns the current control setting for the indicated signal/output.* The register referenced is the Counter Control Register (XWDTPS_CCR_OFFSET)** @param	InstancePtr is a pointer to the XWdtPs instance.* @param	Control is the desired signal/output.*		Valid Control Values are XWDTPS_CLK_PRESCALE and*		XWDTPS_COUNTER_RESET. Only one of them can be specified at a*		time.** @return	The contents of the requested control field in the Counter*		Control Register (XWDTPS_CCR_OFFSET).*		If the Control is XWDTPS_CLK_PRESCALE then use the*		defintions XWDTEPB_CCR_PSCALE_XXXX.*		If the Control is XWDTPS_COUNTER_RESET then the values are*		0x0 to 0xF. This is the most significant nibble of the CCR*		register.** @note		None.*******************************************************************************/u32 XWdtPs_GetControlValue(XWdtPs *InstancePtr, u8 Control){	u32 Register;	u32 ReturnValue = 0;	Xil_AssertNonvoid(InstancePtr != NULL);	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);	Xil_AssertNonvoid((Control == XWDTPS_CLK_PRESCALE) ||			(Control == XWDTPS_COUNTER_RESET));	/*	 * Read the contents of the CCR register.	 */	Register = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,			 XWDTPS_CCR_OFFSET);	if (Control == XWDTPS_CLK_PRESCALE) {		/*		 * Mask off the field in the register.		 */		ReturnValue = Register & XWDTPS_CCR_CLKSEL_MASK;	} else if (Control == XWDTPS_COUNTER_RESET) {		/*		 * Mask off the field in the register.		 */		Register &= XWDTPS_CCR_CRV_MASK;		/*		 * Shift over to the right most positions.		 */		ReturnValue = Register >> XWDTPS_CCR_CRV_SHIFT;	}	return ReturnValue;}/****************************************************************************//**** Updates the current control setting for the indicated signal/output with* the provided value.** Performs a read/modify/write cycle to update the value correctly.* The register referenced is the Counter Control Register (XWDTPS_CCR_OFFSET)** @param	InstancePtr is a pointer to the XWdtPs instance.* @param	Control is the desired signal/output.*		Valid Control Values are XWDTPS_CLK_PRESCALE and*		XWDTPS_COUNTER_RESET. Only one of them can be specified at a*		time.* @param	Value is the desired control value.*		If the Control is XWDTPS_CLK_PRESCALE then use the*		defintions XWDTEPB_CCR_PSCALE_XXXX.*		If the Control is XWDTPS_COUNTER_RESET then the valid values*		are 0x0 to 0xF, this sets the most significant nibble of the CCR*		register.** @return	None.** @note		None.*******************************************************************************/void XWdtPs_SetControlValue(XWdtPs *InstancePtr, u8 Control, u32 Value){	u32 Register = 0;	Xil_AssertVoid(InstancePtr != NULL);	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);	Xil_AssertVoid((Control == XWDTPS_CLK_PRESCALE) ||			(Control == XWDTPS_COUNTER_RESET));	/*	 * Read the contents of the CCR register.	 */	Register = XWdtPs_ReadReg(InstancePtr->Config.BaseAddress,				 XWDTPS_CCR_OFFSET);	if (Control == XWDTPS_CLK_PRESCALE) {		/*		 * Zero the field in the register.		 */		Register &= ~XWDTPS_CCR_CLKSEL_MASK;	} else if (Control == XWDTPS_COUNTER_RESET) {		/*		 * Zero the field in the register.		 */		Register &= ~XWDTPS_CCR_CRV_MASK;		/*		 * Shift Value over to the proper positions.		 */		Value = Value << XWDTPS_CCR_CRV_SHIFT;	}	Register |= Value;	/*	 * Set the access key so the write takes.	 */	Register |= XWDTPS_CCR_CKEY_VAL;	/*	 * Update the CCR with the new value.	 */	XWdtPs_WriteReg(InstancePtr->Config.BaseAddress, XWDTPS_CCR_OFFSET,			  Register);}

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