xadcps.c

自学ZedBoard：使用IP通过ARM PS访问FPGA（源代码）

	 */
	RegValAcq = XAdcPs_ReadInternalReg(InstancePtr,
				XADCPS_SEQ06_OFFSET) &
				XADCPS_SEQ06_CH_VALID_MASK;
	RegValAcq |= (XAdcPs_ReadInternalReg(InstancePtr,
				XADCPS_SEQ07_OFFSET) &
				XADCPS_SEQ07_CH_VALID_MASK) <<
				XADCPS_SEQ_CH_AUX_SHIFT;

	return RegValAcq;
}

/****************************************************************************/
/**
*
* This functions sets the contents of the given Alarm Threshold Register.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param	AlarmThrReg is the index of an Alarm Threshold Register to
*		be set. Use XADCPS_ATR_* constants defined in xadcps.h to
*		specify the index.
* @param	Value is the 16-bit threshold value to write into the register.
*
* @return	None.
*
* @note		Use XAdcPs_SetOverTemp() to set the Over Temperature upper
*		threshold value.
*
*****************************************************************************/
void XAdcPs_SetAlarmThreshold(XAdcPs *InstancePtr, u8 AlarmThrReg, u16 Value)
{

	/*
	 * Assert the arguments.
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertVoid(AlarmThrReg <= XADCPS_ATR_VCCPDRO_LOWER);

	/*
	 * Write the value into the specified Alarm Threshold Register.
	 */
	XAdcPs_WriteInternalReg(InstancePtr, XADCPS_ATR_TEMP_UPPER_OFFSET +
					AlarmThrReg,Value);

}

/****************************************************************************/
/**
*
* This function returns the contents of the specified Alarm Threshold Register.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param	AlarmThrReg is the index of an Alarm Threshold Register
*		to be read. Use XADCPS_ATR_* constants defined in 	xadcps_hw.h
*		to specify the index.
*
* @return	A 16-bit value representing the contents of the selected Alarm
*		Threshold Register.
*
* @note		None.
*
*****************************************************************************/
u16 XAdcPs_GetAlarmThreshold(XAdcPs *InstancePtr, u8 AlarmThrReg)
{
	u32 RegData;
	/*
	 * Assert the arguments.
	 */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertNonvoid(AlarmThrReg <= XADCPS_ATR_VCCPDRO_LOWER);

	/*
	 * Read the specified Alarm Threshold Register and return
	 * the value
	 */
	RegData = XAdcPs_ReadInternalReg(InstancePtr,
				(XADCPS_ATR_TEMP_UPPER_OFFSET + AlarmThrReg));

	return (u16) RegData;
}


/****************************************************************************/
/**
*
* This function enables programming of the powerdown temperature for the
* OverTemp signal in the OT Powerdown register.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
*
* @return	None.
*
* @note		None.
*
*****************************************************************************/
void XAdcPs_EnableUserOverTemp(XAdcPs *InstancePtr)
{
	u16 OtUpper;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

	/*
	 * Read the OT upper Alarm Threshold Register.
	 */
	OtUpper = XAdcPs_ReadInternalReg(InstancePtr,
				   XADCPS_ATR_OT_UPPER_OFFSET);
	OtUpper &= ~(XADCPS_ATR_OT_UPPER_ENB_MASK);

	/*
	 * Preserve the powerdown value and write OT enable value the into the
	 * OT Upper Alarm Threshold Register.
	 */
	OtUpper |= XADCPS_ATR_OT_UPPER_ENB_VAL;
	XAdcPs_WriteInternalReg(InstancePtr,
			  XADCPS_ATR_OT_UPPER_OFFSET, OtUpper);
}

/****************************************************************************/
/**
*
* This function disables programming of the powerdown temperature for the
* OverTemp signal in the OT Powerdown register.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
*
* @return	None.
*
* @note		None.
*
*
*****************************************************************************/
void XAdcPs_DisableUserOverTemp(XAdcPs *InstancePtr)
{
	u16 OtUpper;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

	/*
	 * Read the OT Upper Alarm Threshold Register.
	 */
	OtUpper = XAdcPs_ReadInternalReg(InstancePtr,
					 XADCPS_ATR_OT_UPPER_OFFSET);
	OtUpper &= ~(XADCPS_ATR_OT_UPPER_ENB_MASK);

	XAdcPs_WriteInternalReg(InstancePtr,
			  XADCPS_ATR_OT_UPPER_OFFSET, OtUpper);
}


/****************************************************************************/
/**
*
* The function enables the Event mode or Continuous mode in the sequencer mode.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param	IsEventMode is a boolean parameter that specifies continuous
*		sampling (specify FALSE) or event driven sampling mode (specify
*		TRUE) for the given channel.
*
* @return	None.
*
* @note		None.
*
*****************************************************************************/
void XAdcPs_SetSequencerEvent(XAdcPs *InstancePtr, int IsEventMode)
{
	u32 RegValue;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertVoid((IsEventMode == TRUE) || (IsEventMode == FALSE));

	/*
	 * Read the Configuration Register 0.
	 */
	RegValue = XAdcPs_ReadInternalReg(InstancePtr,
					XADCPS_CFR0_OFFSET) &
					(~XADCPS_CFR0_EC_MASK);

	/*
	 * Set the ADC mode.
	 */
	if (IsEventMode == TRUE) {
		RegValue |= XADCPS_CFR0_EC_MASK;
	} else {
		RegValue &= ~XADCPS_CFR0_EC_MASK;
	}

	XAdcPs_WriteInternalReg(InstancePtr, XADCPS_CFR0_OFFSET,
					RegValue);
}


/****************************************************************************/
/**
*
* This function returns the sampling mode.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
*
* @return	The sampling mode
*		- 0 specifies continuous sampling
*		- 1 specifies event driven sampling mode
*
* @note		None.
*
*****************************************************************************/
int XAdcPs_GetSamplingMode(XAdcPs *InstancePtr)
{
	u32 Mode;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

	/*
	 * Read the sampling mode from the Configuration Register 0.
	 */
	Mode = XAdcPs_ReadInternalReg(InstancePtr,
				   XADCPS_CFR0_OFFSET) &
				   XADCPS_CFR0_EC_MASK;
	if (Mode) {

		return 1;
	}

	return (0);
}


/****************************************************************************/
/**
*
* This function sets the External Mux mode.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param 	MuxMode specifies whether External Mux is used
*		- FALSE specifies NO external MUX
*		- TRUE specifies External Mux is used
* @param	Channel specifies the channel to be used for the
*		external Mux. Please read the Device Spec for which
*		channels are valid for which mode.
*
* @return	None.
*
* @note		There is no Assert in this function for checking the channel
*		number if the external Mux is used. The user should provide a
*		valid channel number.
*
*****************************************************************************/
void XAdcPs_SetMuxMode(XAdcPs *InstancePtr, int MuxMode, u8 Channel)
{
	u32 RegValue;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertVoid((MuxMode == TRUE) || (MuxMode == FALSE));

	/*
	 * Read the Configuration Register 0.
	 */
	RegValue = XAdcPs_ReadInternalReg(InstancePtr,
					XADCPS_CFR0_OFFSET) &
					(~XADCPS_CFR0_MUX_MASK);
	/*
	 * Select the Mux mode and the channel to be used.
	 */
	if (MuxMode == TRUE) {
		RegValue |= XADCPS_CFR0_MUX_MASK;
		RegValue |= (Channel & XADCPS_CFR0_CHANNEL_MASK);

	}

	/*
	 * Write the mux mode into the Configuration Register 0.
	 */
	XAdcPs_WriteInternalReg(InstancePtr, XADCPS_CFR0_OFFSET,
					RegValue);
}


/****************************************************************************/
/**
*
* This function sets the Power Down mode.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param 	Mode specifies the Power Down Mode
*		- XADCPS_PD_MODE_NONE specifies NO Power Down (Both ADC A and
*		ADC B are enabled)
*		- XADCPS_PD_MODE_ADCB specfies the Power Down of ADC B
*		- XADCPS_PD_MODE_XADC specifies the Power Down of
*		both ADC A and ADC B.
*
* @return	None.
*
* @note		None.
*
*****************************************************************************/
void XAdcPs_SetPowerdownMode(XAdcPs *InstancePtr, u32 Mode)
{
	u32 RegValue;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertVoid(Mode < XADCPS_PD_MODE_XADC);


	/*
	 * Read the Configuration Register 2.
	 */
	RegValue = XAdcPs_ReadInternalReg(InstancePtr,
					XADCPS_CFR2_OFFSET) &
					(~XADCPS_CFR2_PD_MASK);
	/*
	 * Select the Power Down mode.
	 */
	RegValue |= (Mode << XADCPS_CFR2_PD_SHIFT);

	XAdcPs_WriteInternalReg(InstancePtr, XADCPS_CFR2_OFFSET,
					RegValue);
}

/****************************************************************************/
/**
*
* This function gets the Power Down mode.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
*
* @return	Mode specifies the Power Down Mode
*		- XADCPS_PD_MODE_NONE specifies NO Power Down (Both ADC A and
*		ADC B are enabled)
*		- XADCPS_PD_MODE_ADCB specfies the Power Down of ADC B
*		- XADCPS_PD_MODE_XADC specifies the Power Down of
*		both ADC A and ADC B.
*
* @note		None.
*
*****************************************************************************/
u32 XAdcPs_GetPowerdownMode(XAdcPs *InstancePtr)
{
	u32 RegValue;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

	/*
	 * Read the Power Down Mode.
	 */
	RegValue = XAdcPs_ReadInternalReg(InstancePtr,
					XADCPS_CFR2_OFFSET) &
					(~XADCPS_CFR2_PD_MASK);
	/*
	 * Return the Power Down mode.
	 */
	return (RegValue >> XADCPS_CFR2_PD_SHIFT);

}

/****************************************************************************/
/**
*
* This function is used for writing to XADC Registers using the command FIFO.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param	RegOffset is the offset of the XADC register to be written.
* @param	Data is the data to be written.
*
* @return	None.
*
* @note		None.
*
*
*****************************************************************************/
void XAdcPs_WriteInternalReg(XAdcPs *InstancePtr, u32 RegOffset, u32 Data)
{
	u32 RegData;

	/*
	 * Write the Data into the FIFO Register.
	 */
	RegData = XAdcPs_FormatWriteData(RegOffset, Data, TRUE);

	XAdcPs_WriteFifo(InstancePtr, RegData);

	/* Read the Read FIFO after any write since for each write
	 * one location of Read FIFO gets updated
	 */
	XAdcPs_ReadFifo(InstancePtr);

}


/****************************************************************************/
/**
*
* This function is used for reading from the XADC Registers using the Data FIFO.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param	RegOffset is the offset of the XADC register to be read.
*
* @return	Data read from the FIFO
*
* @note		None.
*
*
*****************************************************************************/
u32 XAdcPs_ReadInternalReg(XAdcPs *InstancePtr, u32 RegOffset)
{

	u32 RegData;

	RegData = XAdcPs_FormatWriteData(RegOffset, 0x0, FALSE);

	/* Read cmd to FIFO*/
	XAdcPs_WriteFifo(InstancePtr, RegData);

	/* Do a Dummy read */
	RegData = XAdcPs_ReadFifo(InstancePtr);

	/* Do a Dummy write to get the actual read */
	XAdcPs_WriteFifo(InstancePtr, RegData);

	/* Do the Actual read */
	RegData = XAdcPs_ReadFifo(InstancePtr);

	return RegData;

}