xadcps.c

自学ZedBoard：使用IP通过ARM PS访问FPGA（源代码）

* operations.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param	Average is the number of samples of averaging programmed to the
*		Configuration Register 0. Use the XADCPS_AVG_* definitions defined
*		in xadcps.h file :
*		- XADCPS_AVG_0_SAMPLES for no averaging
*		- XADCPS_AVG_16_SAMPLES for 16 samples of averaging
*		- XADCPS_AVG_64_SAMPLES for 64 samples of averaging
*		- XADCPS_AVG_256_SAMPLES for 256 samples of averaging
*
* @return	None.
*
* @note		None.
*
*****************************************************************************/
void XAdcPs_SetAvg(XAdcPs *InstancePtr, u8 Average)
{
	u32 RegData;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertVoid(Average <= XADCPS_AVG_256_SAMPLES);

	/*
	 * Write the averaging value into the Configuration Register 0.
	 */
	RegData = XAdcPs_ReadInternalReg(InstancePtr,
					XADCPS_CFR0_OFFSET) &
					(~XADCPS_CFR0_AVG_VALID_MASK);

	RegData |=  (((u32) Average << XADCPS_CFR0_AVG_SHIFT));
	XAdcPs_WriteInternalReg(InstancePtr, XADCPS_CFR0_OFFSET,
					RegData);

}

/****************************************************************************/
/**
*
* This function returns the number of samples of averaging configured for all
* the channels in the Configuration Register 0.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
*
* @return	The averaging read from the Configuration Register 0 is
*		returned. Use the XADCPS_AVG_* bit definitions defined in
*		xadcps.h file to interpret the returned value :
*		- XADCPS_AVG_0_SAMPLES means no averaging
*		- XADCPS_AVG_16_SAMPLES means 16 samples of averaging
*		- XADCPS_AVG_64_SAMPLES means 64 samples of averaging
*		- XADCPS_AVG_256_SAMPLES means 256 samples of averaging
*
* @note		None.
*
*****************************************************************************/
u8 XAdcPs_GetAvg(XAdcPs *InstancePtr)
{
	u32 Average;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

	/*
	 * Read the averaging value from the Configuration Register 0.
	 */
	Average = XAdcPs_ReadInternalReg(InstancePtr,
			XADCPS_CFR0_OFFSET) & XADCPS_CFR0_AVG_VALID_MASK;


	return ((u8) (Average >> XADCPS_CFR0_AVG_SHIFT));
}

/****************************************************************************/
/**
*
* The function sets the given parameters in the Configuration Register 0 in
* the single channel mode.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param	Channel is the channel number for the singel channel mode.
*		The valid channels are 0 to 5, 8, and 16 to 31.
*		If the external Mux is used then this specifies the channel
*		oonnected to the external Mux. Please read the Device Spec
*		to know which channels are valid.
* @param 	IncreaseAcqCycles is a boolean parameter which specifies whether
*		the Acquisition time for the external channels has to be
*		increased to 10 ADCCLK cycles (specify TRUE) or remain at the
*		default 4 ADCCLK cycles (specify FALSE). This parameter is
*		only valid for the external channels.
* @param 	IsDifferentialMode is a boolean parameter which specifies
*		unipolar(specify FALSE) or differential mode (specify TRUE) for
*		the analog inputs. The 	input mode is only valid for the
*		external channels.
*
* @return
*		- XST_SUCCESS if the given values were written successfully to
*		the Configuration Register 0.
*		- XST_FAILURE if the channel sequencer is enabled or the input
*		parameters are not valid for the selected channel.
*
* @note
*		- The number of samples for the averaging for all the channels
*		is set by using the function XAdcPs_SetAvg.
*		- The calibration of the device is done by doing a ADC
*		conversion on the calibration channel(channel 8). The input
*		parameters IncreaseAcqCycles, IsDifferentialMode and
*		IsEventMode are not valid for this channel
*
*
*****************************************************************************/
int XAdcPs_SetSingleChParams(XAdcPs *InstancePtr,
				u8 Channel,
				int IncreaseAcqCycles,
				int IsEventMode,
				int IsDifferentialMode)
{
	u32 RegValue;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertNonvoid((Channel <= XADCPS_CH_VREFN) ||
			(Channel == XADCPS_CH_ADC_CALIB) ||
			((Channel >= XADCPS_CH_AUX_MIN) &&
			(Channel <= XADCPS_CH_AUX_MAX)));
	Xil_AssertNonvoid((IncreaseAcqCycles == TRUE) ||
			(IncreaseAcqCycles == FALSE));
	Xil_AssertNonvoid((IsEventMode == TRUE) || (IsEventMode == FALSE));
	Xil_AssertNonvoid((IsDifferentialMode == TRUE) ||
			(IsDifferentialMode == FALSE));

	/*
	 * Check if the device is in single channel mode else return failure
	 */
	if ((XAdcPs_GetSequencerMode(InstancePtr) !=
		XADCPS_SEQ_MODE_SINGCHAN)) {
		return XST_FAILURE;
	}

	/*
	 * Read the Configuration Register 0.
	 */
	RegValue = XAdcPs_ReadInternalReg(InstancePtr,
					XADCPS_CFR0_OFFSET) &
					XADCPS_CFR0_AVG_VALID_MASK;

	/*
	 * Select the number of acquisition cycles. The acquisition cycles is
	 * only valid for the external channels.
	 */
	if (IncreaseAcqCycles == TRUE) {
		if (((Channel >= XADCPS_CH_AUX_MIN) &&
			(Channel <= XADCPS_CH_AUX_MAX)) ||
			(Channel == XADCPS_CH_VPVN)){
			RegValue |= XADCPS_CFR0_ACQ_MASK;
		} else {
			return XST_FAILURE;
		}

	}

	/*
	 * Select the input mode. The input mode is only valid for the
	 * external channels.
	 */
	if (IsDifferentialMode == TRUE) {

		if (((Channel >= XADCPS_CH_AUX_MIN) &&
			(Channel <= XADCPS_CH_AUX_MAX)) ||
			(Channel == XADCPS_CH_VPVN)){
			RegValue |= XADCPS_CFR0_DU_MASK;
		} else {
			return XST_FAILURE;
		}
	}

	/*
	 * Select the ADC mode.
	 */
	if (IsEventMode == TRUE) {
		RegValue |= XADCPS_CFR0_EC_MASK;
	}

	/*
	 * Write the given values into the Configuration Register 0.
	 */
	RegValue |= (Channel & XADCPS_CFR0_CHANNEL_MASK);
	XAdcPs_WriteInternalReg(InstancePtr, XADCPS_CFR0_OFFSET,
				RegValue);

	return XST_SUCCESS;
}

/****************************************************************************/
/**
*
* This function enables the alarm outputs for the specified alarms in the
* Configuration Register 1.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param	AlmEnableMask is the bit-mask of the alarm outputs to be enabled
*		in the Configuration Register 1.
*		Bit positions of 1 will be enabled. Bit positions of 0 will be
*		disabled. This mask is formed by OR'ing XADCPS_CFR1_ALM_*_MASK and
*		XADCPS_CFR1_OT_MASK masks defined in xadcps_hw.h.
*
* @return	None.
*
* @note		The implementation of the alarm enables in the Configuration
*		register 1 is such that the alarms for bit positions of 1 will
*		be disabled and alarms for bit positions of 0 will be enabled.
*		The alarm outputs specified by the AlmEnableMask are negated
*		before writing to the Configuration Register 1.
*
*
*****************************************************************************/
void XAdcPs_SetAlarmEnables(XAdcPs *InstancePtr, u16 AlmEnableMask)
{
	u32 RegValue;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);


	RegValue = XAdcPs_ReadInternalReg(InstancePtr, XADCPS_CFR1_OFFSET);

	RegValue &= (u32)~XADCPS_CFR1_ALM_ALL_MASK;
	RegValue |= (~AlmEnableMask & XADCPS_CFR1_ALM_ALL_MASK);

	/*
	 * Enable/disables the alarm enables for the specified alarm bits in the
	 * Configuration Register 1.
	 */
	XAdcPs_WriteInternalReg(InstancePtr, XADCPS_CFR1_OFFSET,
				RegValue);
}

/****************************************************************************/
/**
*
* This function gets the status of the alarm output enables in the
* Configuration Register 1.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
*
* @return	This is the bit-mask of the enabled alarm outputs in the
*		Configuration Register 1. Use the masks XADCPS_CFR1_ALM*_* and
*		XADCPS_CFR1_OT_MASK defined in xadcps_hw.h to interpret the
*		returned value.
*		Bit positions of 1 indicate that the alarm output is enabled.
*		Bit positions of 0 indicate that the alarm output is disabled.
*
*
* @note		The implementation of the alarm enables in the Configuration
*		register 1 is such that alarms for the bit positions of 1 will
*		be disabled and alarms for bit positions of 0 will be enabled.
*		The enabled alarm outputs returned by this function is the
*		negated value of the the data read from the Configuration
*		Register 1.
*
*****************************************************************************/
u16 XAdcPs_GetAlarmEnables(XAdcPs *InstancePtr)
{
	u32 RegValue;

	/*
	 * Assert the arguments
	 */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

	/*
	 * Read the status of alarm output enables from the Configuration
	 * Register 1.
	 */
	RegValue = XAdcPs_ReadInternalReg(InstancePtr,
			XADCPS_CFR1_OFFSET) & XADCPS_CFR1_ALM_ALL_MASK;
	return (u16) (~RegValue & XADCPS_CFR1_ALM_ALL_MASK);
}

/****************************************************************************/
/**
*
* This function enables the specified calibration in the Configuration
* Register 1 :
*
* - XADCPS_CFR1_CAL_ADC_OFFSET_MASK : Calibration 0 -ADC offset correction
* - XADCPS_CFR1_CAL_ADC_GAIN_OFFSET_MASK : Calibration 1 -ADC gain and offset
*						correction
* - XADCPS_CFR1_CAL_PS_OFFSET_MASK : Calibration 2 -Power Supply sensor
*					offset correction
* - XADCPS_CFR1_CAL_PS_GAIN_OFFSET_MASK : Calibration 3 -Power Supply sensor
*						gain and offset correction
* - XADCPS_CFR1_CAL_DISABLE_MASK : No Calibration
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param	Calibration is the Calibration to be applied.
*		Use XADCPS_CFR1_CAL*_* bits defined in xadcps_hw.h.
*		Multiple calibrations can be enabled at a time by oring the
*		XADCPS_CFR1_CAL_ADC_* and XADCPS_CFR1_CAL_PS_* bits.
*		Calibration can be disabled by specifying
		XADCPS_CFR1_CAL_DISABLE_MASK;
*
* @return	None.
*
* @note		None.
*
*****************************************************************************/
void XAdcPs_SetCalibEnables(XAdcPs *InstancePtr, u16 Calibration)
{
	u32 RegValue;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertVoid(((Calibration >= XADCPS_CFR1_CAL_ADC_OFFSET_MASK) &&
			(Calibration <= XADCPS_CFR1_CAL_VALID_MASK)) ||
			(Calibration == XADCPS_CFR1_CAL_DISABLE_MASK));

	/*
	 * Set the specified calibration in the Configuration Register 1.
	 */
	RegValue = XAdcPs_ReadInternalReg(InstancePtr,
					XADCPS_CFR1_OFFSET);

	RegValue &= (~ XADCPS_CFR1_CAL_VALID_MASK);
	RegValue |= (Calibration & XADCPS_CFR1_CAL_VALID_MASK);
	XAdcPs_WriteInternalReg(InstancePtr, XADCPS_CFR1_OFFSET,
				RegValue);

}

/****************************************************************************/
/**
*
* This function reads the value of the calibration enables from the
* Configuration Register 1.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
*
* @return	The value of the calibration enables in the Configuration
*		Register 1 :
*		- XADCPS_CFR1_CAL_ADC_OFFSET_MASK : ADC offset correction
*		- XADCPS_CFR1_CAL_ADC_GAIN_OFFSET_MASK : ADC gain and offset
*				correction
*		- XADCPS_CFR1_CAL_PS_OFFSET_MASK : Power Supply sensor offset
*				correction
*		- XADCPS_CFR1_CAL_PS_GAIN_OFFSET_MASK : Power Supply sensor
*				gain and offset correction
*		- XADCPS_CFR1_CAL_DISABLE_MASK : No Calibration
*
* @note		None.
*
*****************************************************************************/
u16 XAdcPs_GetCalibEnables(XAdcPs *InstancePtr)
{
	/*
	 * Assert the arguments.
	 */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

	/*
	 * Read the calibration enables from the Configuration Register 1.
	 */
	return (u16) XAdcPs_ReadInternalReg(InstancePtr,
			XADCPS_CFR1_OFFSET) & XADCPS_CFR1_CAL_VALID_MASK;

}

/****************************************************************************/
/**
*
* This function sets the specified Channel Sequencer Mode in the Configuration
* Register 1 :
*		- Default safe mode (XADCPS_SEQ_MODE_SAFE)
*		- One pass through sequence (XADCPS_SEQ_MODE_ONEPASS)
*		- Continuous channel sequencing (XADCPS_SEQ_MODE_CONTINPASS)
*		- Single Channel/Sequencer off (XADCPS_SEQ_MODE_SINGCHAN)
*		- Simulataneous sampling mode (XADCPS_SEQ_MODE_SIMUL_SAMPLING)
*		- Independent mode (XADCPS_SEQ_MODE_INDEPENDENT)
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
* @param	SequencerMode is the sequencer mode to be set.
*		Use XADCPS_SEQ_MODE_* bits defined in xadcps.h.
* @return	None.
*
* @note		Only one of the modes can be enabled at a time. Please
*		read the Spec of the XADC for further information about the
*		sequencer modes.
*
*
*****************************************************************************/
void XAdcPs_SetSequencerMode(XAdcPs *InstancePtr, u8 SequencerMode)
{
	u32 RegValue;

	/*
	 * Assert the arguments.
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertVoid((SequencerMode <= XADCPS_SEQ_MODE_SIMUL_SAMPLING) ||
			(SequencerMode == XADCPS_SEQ_MODE_INDEPENDENT));

	/*
	 * Set the specified sequencer mode in the Configuration Register 1.
	 */
	RegValue = XAdcPs_ReadInternalReg(InstancePtr,
					XADCPS_CFR1_OFFSET);
	RegValue &= (~ XADCPS_CFR1_SEQ_VALID_MASK);
	RegValue |= ((SequencerMode  << XADCPS_CFR1_SEQ_SHIFT) &
					XADCPS_CFR1_SEQ_VALID_MASK);
	XAdcPs_WriteInternalReg(InstancePtr, XADCPS_CFR1_OFFSET,
				RegValue);

}

/****************************************************************************/
/**
*
* This function gets the channel sequencer mode from the Configuration
* Register 1.
*
* @param	InstancePtr is a pointer to the XAdcPs instance.
*
* @return	The channel sequencer mode :
*		- XADCPS_SEQ_MODE_SAFE : Default safe mode
*		- XADCPS_SEQ_MODE_ONEPASS : One pass through sequence
*		- XADCPS_SEQ_MODE_CONTINPASS : Continuous channel sequencing
*		- XADCPS_SEQ_MODE_SINGCHAN : Single channel/Sequencer off
*		- XADCPS_SEQ_MODE_SIMUL_SAMPLING : Simulataneous sampling mode
*		- XADCPS_SEQ_MODE_INDEPENDENT : Independent mode
*
*
* @note		None.
*
*****************************************************************************/
u8 XAdcPs_GetSequencerMode(XAdcPs *InstancePtr)
{
	/*
	 * Assert the arguments.
	 */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);