usleep.c

自学ZedBoard：使用IP通过ARM PS访问FPGA（源代码）

/* $Id: usleep.c,v 1.1.4.1 2011/10/24 09:35:15 sadanan Exp $ */
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/*****************************************************************************/
/**
*
* @file usleep.c
*
* This function provides a microsecond delay using the internal cycle count
* register in the ARM Cortex A9.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver   Who      Date     Changes
* ----- -------- -------- -----------------------------------------------
* 1.00a ecm/sdm  11/11/09 First release
* 3.06a sgd      05/15/12 Upadted micro sleep function to make use Global Timer
* 3.06a asa		 06/17/12 Revrted back earlier changes to use Global Timer.
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/

#include "sleep.h"
#include "xparameters.h"
#include "xpseudo_asm.h"
#include "xreg_cortexa9.h"

#define COUNTS_PER_SECOND          (XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ / 64)

/*****************************************************************************/
/**
*
* This is not implemented .
*
* @param    nanoseconds
*
* @return   None
*
* @note     None.
*
****************************************************************************/
void nanosleep(unsigned int nanoseconds){
	/* not implemented */
	(void)nanoseconds;
}

/*****************************************************************************/
/**
*
* This is the main function for the Interrupt Controller example .
*
* @param	useconds requested
*
* @return	0 if the delay can be achieved, -1 if the requested delay
*		is out of range
*
* @note		None.
*
****************************************************************************/
int usleep(unsigned int useconds){
	unsigned long tEnd, tCur;
	unsigned int reg;

	/* check requested delay for out of range */

	if (useconds == 0) {
		return 0;
	}

	if (((COUNTS_PER_SECOND / 1000000) > 0) &&
	    (useconds > (0xFFFFFFFF / (COUNTS_PER_SECOND / 1000000)))) {
		return -1;
	}

	/* enable the counter */
	mtcp(XREG_CP15_PERF_MONITOR_CTRL, 1);
#ifdef __GNUC__
	reg = mfcp(XREG_CP15_COUNT_ENABLE_SET);
#else
	{ register unsigned int Reg __asm(XREG_CP15_COUNT_ENABLE_SET);
	  reg = Reg; }
#endif
	mtcp(XREG_CP15_COUNT_ENABLE_SET, reg | 0x80000000);

#ifdef __GNUC__
	tCur = mfcp(XREG_CP15_PERF_CYCLE_COUNTER);
#else
	{ register unsigned int Reg __asm(XREG_CP15_PERF_CYCLE_COUNTER);
	  tCur = Reg; }
#endif
	tEnd = tCur + (useconds * (COUNTS_PER_SECOND / 1000000));

	do {
#ifdef __GNUC__
		tCur = mfcp(XREG_CP15_PERF_CYCLE_COUNTER);
#else
		{ register unsigned int Reg __asm(XREG_CP15_PERF_CYCLE_COUNTER);
		  tCur = Reg; }
#endif
	} while (tCur < tEnd);

	return 0;
}