📄 xcanps.c
字号:
break; case XCANPS_AFR_UAF4_MASK: /* Acceptance Filter No. 4 */ XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFMR4_OFFSET, MaskValue); XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFIR4_OFFSET, IdValue); break; } return XST_SUCCESS;}/*****************************************************************************//**** This function reads the values of the Acceptance Filter Mask and ID Register* for the specified Acceptance Filter. Use XCANPS_IDR_* defined in xcanps_hw.h* to interpret the values. Read the xcanps.h file and device specification for* details.** @param InstancePtr is a pointer to the XCanPs instance.* @param FilterIndex defines which Acceptance Filter Mask Register to get* Mask and ID from. Use any single XCANPS_FILTER_* value.* @param MaskValue is a pointer to the data in which the Mask value read* from the chosen Acceptance Filter Mask Register is returned.* @param IdValue is a pointer to the data in which the ID value read* from the chosen Acceptance Filter ID Register is returned.** @return None.** @note None.*******************************************************************************/void XCanPs_AcceptFilterGet(XCanPs *InstancePtr, u32 FilterIndex, u32 *MaskValue, u32 *IdValue){ Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); Xil_AssertVoid((FilterIndex == XCANPS_AFR_UAF4_MASK) || (FilterIndex == XCANPS_AFR_UAF3_MASK) || (FilterIndex == XCANPS_AFR_UAF2_MASK) || (FilterIndex == XCANPS_AFR_UAF1_MASK)); Xil_AssertVoid(MaskValue != NULL); Xil_AssertVoid(IdValue != NULL); /* * Read from the AFMR and AFIR of the specified filter. */ switch (FilterIndex) { case XCANPS_AFR_UAF1_MASK: /* Acceptance Filter No. 1 */ *MaskValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFMR1_OFFSET); *IdValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFIR1_OFFSET); break; case XCANPS_AFR_UAF2_MASK: /* Acceptance Filter No. 2 */ *MaskValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFMR2_OFFSET); *IdValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFIR2_OFFSET); break; case XCANPS_AFR_UAF3_MASK: /* Acceptance Filter No. 3 */ *MaskValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFMR3_OFFSET); *IdValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFIR3_OFFSET); break; case XCANPS_AFR_UAF4_MASK: /* Acceptance Filter No. 4 */ *MaskValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFMR4_OFFSET); *IdValue = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_AFIR4_OFFSET); break; }}/*****************************************************************************//**** This routine sets Baud Rate Prescaler value. The system clock for the CAN* controller is divided by (Prescaler + 1) to generate the quantum clock* needed for sampling and synchronization. Read the device specification* for details.** Baud Rate Prescaler can be set only if the CAN device is in Configuration* Mode. Call XCanPs_EnterMode() to enter Configuration Mode before using this* function.** @param InstancePtr is a pointer to the XCanPs instance.* @param Prescaler is the value to set. Valid values are from 0 to 255.** @return* - XST_SUCCESS if the Baud Rate Prescaler value is set* successfully.* - XST_FAILURE if CAN device is not in Configuration Mode.** @note None.*******************************************************************************/int XCanPs_SetBaudRatePrescaler(XCanPs *InstancePtr, u8 Prescaler){ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); if (XCanPs_GetMode(InstancePtr) != XCANPS_MODE_CONFIG) { return XST_FAILURE; } XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr, XCANPS_BRPR_OFFSET, (u32)Prescaler); return XST_SUCCESS;}/*****************************************************************************//**** This routine gets Baud Rate Prescaler value. The system clock for the CAN* controller is divided by (Prescaler + 1) to generate the quantum clock* needed for sampling and synchronization. Read the device specification for* details.** @param InstancePtr is a pointer to the XCanPs instance.** @return Current used Baud Rate Prescaler value. The value's range is* from 0 to 255.** @note None.*******************************************************************************/u8 XCanPs_GetBaudRatePrescaler(XCanPs *InstancePtr){ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); return (u8) XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_BRPR_OFFSET);}/*****************************************************************************//**** This routine sets Bit time. Time segment 1, Time segment 2 and* Synchronization Jump Width are set in this function. Device specification* requires the values passed into this function be one less than the actual* values of these fields. Read the device specification for details.** Bit time can be set only if the CAN device is in Configuration Mode.* Call XCanPs_EnterMode() to enter Configuration Mode before using this* function.** @param InstancePtr is a pointer to the XCanPs instance.* @param SyncJumpWidth is the Synchronization Jump Width value to set.* Valid values are from 0 to 3.* @param TimeSegment2 is the Time Segment 2 value to set. Valid values* are from 0 to 7.* @param TimeSegment1 is the Time Segment 1 value to set. Valid values* are from 0 to 15.** @return* - XST_SUCCESS if the Bit time is set successfully.* - XST_FAILURE if CAN device is not in Configuration Mode.** @note None.*******************************************************************************/int XCanPs_SetBitTiming(XCanPs *InstancePtr, u8 SyncJumpWidth, u8 TimeSegment2, u8 TimeSegment1){ u32 Value; Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); Xil_AssertNonvoid(SyncJumpWidth <= 3); Xil_AssertNonvoid(TimeSegment2 <= 7); Xil_AssertNonvoid(TimeSegment1 <= 15 ); if (XCanPs_GetMode(InstancePtr) != XCANPS_MODE_CONFIG) { return XST_FAILURE; } Value = ((u32) TimeSegment1) & XCANPS_BTR_TS1_MASK; Value |= (((u32) TimeSegment2) << XCANPS_BTR_TS2_SHIFT) & XCANPS_BTR_TS2_MASK; Value |= (((u32) SyncJumpWidth) << XCANPS_BTR_SJW_SHIFT) & XCANPS_BTR_SJW_MASK; XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr, XCANPS_BTR_OFFSET, Value); return XST_SUCCESS;}/*****************************************************************************//**** This routine gets Bit time. Time segment 1, Time segment 2 and* Synchronization Jump Width values are read in this function. According to* device specification, the actual value of each of these fields is one* more than the value read. Read the device specification for details.** @param InstancePtr is a pointer to the XCanPs instance.* @param SyncJumpWidth will store the Synchronization Jump Width value* after this function returns. Its value ranges from 0 to 3.* @param TimeSegment2 will store the Time Segment 2 value after this* function returns. Its value ranges from 0 to 7.* @param TimeSegment1 will store the Time Segment 1 value after this* function returns. Its value ranges from 0 to 15.** @return None.** @note None.*******************************************************************************/void XCanPs_GetBitTiming(XCanPs *InstancePtr, u8 *SyncJumpWidth, u8 *TimeSegment2, u8 *TimeSegment1){ u32 Value; Xil_AssertVoid(InstancePtr != NULL); Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); Xil_AssertVoid(SyncJumpWidth != NULL); Xil_AssertVoid(TimeSegment2 != NULL); Xil_AssertVoid(TimeSegment1 != NULL); Value = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_BTR_OFFSET); *TimeSegment1 = (u8) (Value & XCANPS_BTR_TS1_MASK); *TimeSegment2 = (u8) ((Value & XCANPS_BTR_TS2_MASK) >> XCANPS_BTR_TS2_SHIFT); *SyncJumpWidth = (u8) ((Value & XCANPS_BTR_SJW_MASK) >> XCANPS_BTR_SJW_SHIFT);}/****************************************************************************//**** This routine sets the Rx Full threshold in the Watermark Interrupt Register.** @param InstancePtr is a pointer to the XCanPs instance.* @param Threshold is the threshold to be set. The valid values are* from 1 to 63.** @return* - XST_FAILURE - If the CAN device is not in Configuration Mode.* - XST_SUCCESS - If the Rx Full threshold is set in Watermark* Interrupt Register.** @note The threshold can only be set when the CAN device is in the* configuration mode.******************************************************************************/int XCanPs_SetRxIntrWatermark(XCanPs *InstancePtr, u8 Threshold){ u32 ThrReg; Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); Xil_AssertNonvoid(Threshold <= 63); if (XCanPs_GetMode(InstancePtr) != XCANPS_MODE_CONFIG) return XST_FAILURE; ThrReg = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_WIR_OFFSET); ThrReg &= XCANPS_WIR_EW_MASK; ThrReg |= ((u32)Threshold & XCANPS_WIR_FW_MASK); XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr, XCANPS_WIR_OFFSET, ThrReg); return XST_SUCCESS;}/****************************************************************************//**** This routine gets the Rx Full threshold from the Watermark Interrupt Register.** @param InstancePtr is a pointer to the XCanPs instance.** @return The Rx FIFO full watermark threshold value. The valid values* are 1 to 63.** @note None.******************************************************************************/u8 XCanPs_GetRxIntrWatermark(XCanPs *InstancePtr){ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); return (u8) (XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_WIR_OFFSET) & XCANPS_WIR_FW_MASK);}/****************************************************************************//**** This routine sets the Tx Empty Threshold in the Watermark Interrupt Register.** @param InstancePtr is a pointer to the XCanPs instance.* @param Threshold is the threshold to be set. The valid values are* from 1 to 63.** @return* - XST_FAILURE - If the CAN device is not in Configuration Mode.* - XST_SUCCESS - If the threshold is set in Watermark* Interrupt Register.** @note The threshold can only be set when the CAN device is in the* configuration mode.******************************************************************************/int XCanPs_SetTxIntrWatermark(XCanPs *InstancePtr, u8 Threshold){ u32 ThrReg; Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); Xil_AssertNonvoid(Threshold <= 63); if (XCanPs_GetMode(InstancePtr) != XCANPS_MODE_CONFIG) return XST_FAILURE; ThrReg = XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_WIR_OFFSET); ThrReg &= XCANPS_WIR_FW_MASK; ThrReg |= ((u32)(Threshold << XCANPS_WIR_EW_SHIFT) & XCANPS_WIR_EW_MASK); XCanPs_WriteReg(InstancePtr->CanConfig.BaseAddr, XCANPS_WIR_OFFSET, ThrReg); return XST_SUCCESS;}/****************************************************************************//**** This routine gets the Tx Empty threshold from Watermark Interrupt Register.** @param InstancePtr is a pointer to the XCanPs instance.** @return The Tx Empty FIFO threshold value. The valid values are 1 to 63.** @note None.******************************************************************************/u8 XCanPs_GetTxIntrWatermark(XCanPs *InstancePtr){ Xil_AssertNonvoid(InstancePtr != NULL); Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY); return (u8) ((XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr, XCANPS_WIR_OFFSET) & XCANPS_WIR_EW_MASK) >> XCANPS_WIR_EW_SHIFT);}/******************************************************************************//* * This routine is a stub for the asynchronous callbacks. The stub is here in * case the upper layer forgot to set the handler(s). On initialization, all * handlers are set to this callback. It is considered an error for this handler * to be invoked. * ******************************************************************************/static void StubHandler(void){ Xil_AssertVoidAlways();}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -