xusbps_endpoint.h

自学ZedBoard：使用IP通过ARM PS访问FPGA（源代码）

/******************************************************************************
*
* (c) Copyright 2010-12 Xilinx, Inc. All rights reserved.
*
* This file contains confidential and proprietary information of Xilinx, Inc.
* and is protected under U.S. and international copyright and other
* intellectual property laws.
*
* DISCLAIMER
* This disclaimer is not a license and does not grant any rights to the
* materials distributed herewith. Except as otherwise provided in a valid
* license issued to you by Xilinx, and to the maximum extent permitted by
* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL
* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS,
* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE;
* and (2) Xilinx shall not be liable (whether in contract or tort, including
* negligence, or under any other theory of liability) for any loss or damage
* of any kind or nature related to, arising under or in connection with these
* materials, including for any direct, or any indirect, special, incidental,
* or consequential loss or damage (including loss of data, profits, goodwill,
* or any type of loss or damage suffered as a result of any action brought by
* a third party) even if such damage or loss was reasonably foreseeable or
* Xilinx had been advised of the possibility of the same.
*
* CRITICAL APPLICATIONS
* Xilinx products are not designed or intended to be fail-safe, or for use in
* any application requiring fail-safe performance, such as life-support or
* safety devices or systems, Class III medical devices, nuclear facilities,
* applications related to the deployment of airbags, or any other applications
* that could lead to death, personal injury, or severe property or
* environmental damage (individually and collectively, "Critical
* Applications"). Customer assumes the sole risk and liability of any use of
* Xilinx products in Critical Applications, subject only to applicable laws
* and regulations governing limitations on product liability.
*
* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE
* AT ALL TIMES.
*
******************************************************************************/
/*****************************************************************************/
/**
 *
 * @file xusbps_endpoint.h
 *
 * This is an internal file containung the definitions for endpoints. It is
 * included by the xusbps_endpoint.c which is implementing the endpoint
 * functions and by xusbps_intr.c.
 *
 * <pre>
 * MODIFICATION HISTORY:
 *
 * Ver   Who  Date     Changes
 * ----- ---- -------- --------------------------------------------------------
 * 1.00a wgr  10/10/10 First release
 * </pre>
 *
 ******************************************************************************/
#ifndef XUSBPS_ENDPOINT_H
#define XUSBPS_ENDPOINT_H

#ifdef __cplusplus
extern "C" {
#endif

/***************************** Include Files *********************************/

#include "xil_cache.h"
#include "xusbps.h"
#include "xil_types.h"

/**************************** Type Definitions *******************************/

/************************** Constant Definitions *****************************/


/**
 * Endpoint Device Transfer Descriptor
 *
 * The dTD describes to the device controller the location and quantity of data
 * to be sent/received for given transfer. The driver does not attempt to
 * modify any field in an active dTD except the Next Link Pointer.
 */
#define XUSBPS_dTDNLP		0x00 /**< Pointer to the next descriptor */
#define XUSBPS_dTDTOKEN	0x04 /**< Descriptor Token */
#define XUSBPS_dTDBPTR0	0x08 /**< Buffer Pointer 0 */
#define XUSBPS_dTDBPTR1	0x0C /**< Buffer Pointer 1 */
#define XUSBPS_dTDBPTR2	0x10 /**< Buffer Pointer 2 */
#define XUSBPS_dTDBPTR3	0x14 /**< Buffer Pointer 3 */
#define XUSBPS_dTDBPTR4	0x18 /**< Buffer Pointer 4 */
#define XUSBPS_dTDBPTR(n)	(XUSBPS_dTDBPTR0 + (n) * 0x04)
#define XUSBPS_dTDRSRVD	0x1C /**< Reserved field */

/* We use the reserved field in the dTD to store user data. */
#define XUSBPS_dTDUSERDATA	XUSBPS_dTDRSRVD /**< Reserved field */


/** @name dTD Next Link Pointer (dTDNLP) bit positions.
 *  @{
 */
#define XUSBPS_dTDNLP_T_MASK		0x00000001
				/**< USB dTD Next Link Pointer Terminate Bit */
#define XUSBPS_dTDNLP_ADDR_MASK	0xFFFFFFE0
				/**< USB dTD Next Link Pointer Address [31:5] */
/* @} */


/** @name dTD Token (dTDTOKEN) bit positions.
 *  @{
 */
#define XUSBPS_dTDTOKEN_XERR_MASK	0x00000008 /**< dTD Transaction Error */
#define XUSBPS_dTDTOKEN_BUFERR_MASK	0x00000020 /**< dTD Data Buffer Error */
#define XUSBPS_dTDTOKEN_HALT_MASK	0x00000040 /**< dTD Halted Flag */
#define XUSBPS_dTDTOKEN_ACTIVE_MASK	0x00000080 /**< dTD Active Bit */
#define XUSBPS_dTDTOKEN_MULTO_MASK	0x00000C00 /**< Multiplier Override Field [1:0] */
#define XUSBPS_dTDTOKEN_IOC_MASK	0x00008000 /**< Interrupt on Complete Bit */
#define XUSBPS_dTDTOKEN_LEN_MASK	0x7FFF0000 /**< Transfer Length Field */
/* @} */


/***************** Macros (Inline Functions) Definitions *********************/

/*****************************************************************************/
/**
 *
 * IMPORTANT NOTE:
 * ===============
 *
 * Many of the following macros modify Device Queue Head (dQH) data structures
 * and Device Transfer Descriptor (dTD) data structures. Those structures can
 * potentially reside in CACHED memory. Therefore, it's the callers
 * responsibility to ensure cache coherency by using provided
 *
 * 	XUsbPs_dQHInvalidateCache()
 * 	XUsbPs_dQHFlushCache()
 * 	XUsbPs_dTDInvalidateCache()
 * 	XUsbPs_dTDFlushCache()
 *
 * function calls.
 *
 ******************************************************************************/
#define XUsbPs_dTDInvalidateCache(dTDPtr) \
		Xil_DCacheInvalidateRange((unsigned int)dTDPtr, sizeof(XUsbPs_dTD))

#define XUsbPs_dTDFlushCache(dTDPtr) \
		Xil_DCacheFlushRange((unsigned int)dTDPtr, sizeof(XUsbPs_dTD))

#define XUsbPs_dQHInvalidateCache(dQHPtr) \
		Xil_DCacheInvalidateRange((unsigned int)dQHPtr, sizeof(XUsbPs_dQH))

#define XUsbPs_dQHFlushCache(dQHPtr) \
		Xil_DCacheFlushRange((unsigned int)dQHPtr, sizeof(XUsbPs_dQH))

/*****************************************************************************/
/**
 *
 * This macro sets the Transfer Length for the given Transfer Descriptor.
 *
 * @param	dTDPtr is pointer to the dTD element.
 * @param	Len is the length to be set. Range: 0..16384
 *
 * @note	C-style signature:
 *		void XUsbPs_dTDSetTransferLen(u32 dTDPtr, u32 Len)
 *
 ******************************************************************************/
#define XUsbPs_dTDSetTransferLen(dTDPtr, Len)				\
		XUsbPs_WritedTD(dTDPtr, XUSBPS_dTDTOKEN, 		\
			(XUsbPs_ReaddTD(dTDPtr, XUSBPS_dTDTOKEN) &	\
				~XUSBPS_dTDTOKEN_LEN_MASK) | ((Len) << 16))


/*****************************************************************************/
/**
 *
 * This macro gets the Next Link pointer of the given Transfer Descriptor.
 *
 * @param	dTDPtr is pointer to the dTD element.
 *
 * @return 	TransferLength field of the descriptor.
 *
 * @note	C-style signature:
 *		u32 XUsbPs_dTDGetTransferLen(u32 dTDPtr)
 *
 ******************************************************************************/
#define XUsbPs_dTDGetNLP(dTDPtr)					\
		(XUsbPs_dTD *) ((XUsbPs_ReaddTD(dTDPtr, XUSBPS_dTDNLP)\
					& XUSBPS_dTDNLP_ADDR_MASK))


/*****************************************************************************/
/**
 *
 * This macro sets the Next Link pointer of the given Transfer Descriptor.
 *
 * @param	dTDPtr is a pointer to the dTD element.
 * @param	NLP is the Next Link Pointer
 *
 * @note	C-style signature:
 *		void XUsbPs_dTDSetTransferLen(u32 dTDPtr, u32 Len)
 *
 ******************************************************************************/
#define XUsbPs_dTDSetNLP(dTDPtr, NLP)					\
		XUsbPs_WritedTD(dTDPtr, XUSBPS_dTDNLP, 		\
			(XUsbPs_ReaddTD(dTDPtr, XUSBPS_dTDNLP) &	\
				~XUSBPS_dTDNLP_ADDR_MASK) |		\
					((NLP) & XUSBPS_dTDNLP_ADDR_MASK))


/*****************************************************************************/
/**
 *
 * This macro gets the Transfer Length for the given Transfer Descriptor.
 *
 * @param	dTDPtr is a pointer to the dTD element.
 *
 * @return 	TransferLength field of the descriptor.
 *
 * @note	C-style signature:
 *		u32 XUsbPs_dTDGetTransferLen(u32 dTDPtr)
 *
 ******************************************************************************/
#define XUsbPs_dTDGetTransferLen(dTDPtr)				\
		(u32) ((XUsbPs_ReaddTD(dTDPtr, XUSBPS_dTDTOKEN) 	\
				& XUSBPS_dTDTOKEN_LEN_MASK) >> 16)


/*****************************************************************************/
/**
 *
 * This macro sets the Interrupt On Complete (IOC) bit for the given Transfer
 * Descriptor.
 *
 * @param	dTDPtr is a pointer to the dTD element.
 *
 * @note	C-style signature:
 *		void XUsbPs_dTDSetIOC(u32 dTDPtr)
 *
 ******************************************************************************/
#define XUsbPs_dTDSetIOC(dTDPtr)					\
		XUsbPs_WritedTD(dTDPtr, XUSBPS_dTDTOKEN, 		\
			XUsbPs_ReaddTD(dTDPtr, XUSBPS_dTDTOKEN) |	\
						XUSBPS_dTDTOKEN_IOC_MASK)


/*****************************************************************************/
/**
 *
 * This macro sets the Terminate bit for the given Transfer Descriptor.
 *
 * @param	dTDPtr is a pointer to the dTD element.
 *
 * @note	C-style signature:
 *		void XUsbPs_dTDSetTerminate(u32 dTDPtr)
 *
 ******************************************************************************/
#define XUsbPs_dTDSetTerminate(dTDPtr)				\
		XUsbPs_WritedTD(dTDPtr, XUSBPS_dTDNLP, 		\
			XUsbPs_ReaddTD(dTDPtr, XUSBPS_dTDNLP) |	\
						XUSBPS_dTDNLP_T_MASK)