📄 xqspips.h
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/** @name Flash commands * * The following constants define most of the commands supported by flash * devices. Users can add more commands supported by the flash devices * * @{ */#define XQSPIPS_FLASH_OPCODE_WRSR 0x01 /* Write status register */#define XQSPIPS_FLASH_OPCODE_PP 0x02 /* Page program */#define XQSPIPS_FLASH_OPCODE_NORM_READ 0x03 /* Normal read data bytes */#define XQSPIPS_FLASH_OPCODE_WRDS 0x04 /* Write disable */#define XQSPIPS_FLASH_OPCODE_RDSR1 0x05 /* Read status register 1 */#define XQSPIPS_FLASH_OPCODE_WREN 0x06 /* Write enable */#define XQSPIPS_FLASH_OPCODE_FAST_READ 0x0B /* Fast read data bytes */#define XQSPIPS_FLASH_OPCODE_BE_4K 0x20 /* Erase 4KiB block */#define XQSPIPS_FLASH_OPCODE_RDSR2 0x35 /* Read status register 2 */#define XQSPIPS_FLASH_OPCODE_DUAL_READ 0x3B /* Dual read data bytes */#define XQSPIPS_FLASH_OPCODE_BE_32K 0x52 /* Erase 32KiB block */#define XQSPIPS_FLASH_OPCODE_QUAD_READ 0x6B /* Quad read data bytes */#define XQSPIPS_FLASH_OPCODE_ERASE_SUS 0x75 /* Erase suspend */#define XQSPIPS_FLASH_OPCODE_ERASE_RES 0x7A /* Erase resume */#define XQSPIPS_FLASH_OPCODE_RDID 0x9F /* Read JEDEC ID */#define XQSPIPS_FLASH_OPCODE_BE 0xC7 /* Erase whole flash block */#define XQSPIPS_FLASH_OPCODE_SE 0xD8 /* Sector erase (usually 64KB)*//*@}*//** @name QSPI Instruction/Data options * * The following constants define whether a QSPI transfer includes a command or * is just a data transfer. * * @{ */#define XQSPIPS_IS_DATA 0x00 /* Data-only transfer */#define XQSPIPS_IS_INST 0x01 /* The fist bytes in a transfer is instruction *//*@}*//**************************** Type Definitions *******************************//** * The handler data type allows the user to define a callback function to * handle the asynchronous processing for the QSPI device. The application * using this driver is expected to define a handler of this type to support * interrupt driven mode. The handler executes in an interrupt context, so * only minimal processing should be performed. * * @param CallBackRef is the callback reference passed in by the upper * layer when setting the callback functions, and passed back to * the upper layer when the callback is invoked. Its type is * not important to the driver, so it is a void pointer. * @param StatusEvent holds one or more status events that have occurred. * See the XQspiPs_SetStatusHandler() for details on the status * events that can be passed in the callback. * @param ByteCount indicates how many bytes of data were successfully * transferred. This may be less than the number of bytes * requested if the status event indicates an error. */typedef void (*XQspiPs_StatusHandler) (void *CallBackRef, u32 StatusEvent, unsigned ByteCount);/** * This typedef contains configuration information for the device. */typedef struct { u16 DeviceId; /**< Unique ID of device */ u32 BaseAddress; /**< Base address of the device */ u32 InputClockHz; /**< Input clock frequency */} XQspiPs_Config;/** * The XQspiPs driver instance data. The user is required to allocate a * variable of this type for every QSPI device in the system. A pointer * to a variable of this type is then passed to the driver API functions. */typedef struct { XQspiPs_Config Config; /**< Configuration structure */ u32 IsReady; /**< Device is initialized and ready */ u8 *SendBufferPtr; /**< Buffer to send (state) */ u8 *RecvBufferPtr; /**< Buffer to receive (state) */ int RequestedBytes; /**< Number of bytes to transfer (state) */ int RemainingBytes; /**< Number of bytes left to transfer(state) */ u32 IsBusy; /**< A transfer is in progress (state) */ u32 SlaveSelect; /**< The slave select line that needs to be asserted during a transfer */ XQspiPs_StatusHandler StatusHandler; void *StatusRef; /**< Callback reference for status handler */} XQspiPs;/***************** Macros (Inline Functions) Definitions *********************//****************************************************************************//**** Set the contents of the slave idle count register.** @param InstancePtr is a pointer to the XQspiPs instance.* @param RegisterValue is the value to be writen, valid values are* 0-65535.** @return None** @note* C-Style signature:* void XQspiPs_SetSlaveIdle(XQspiPs *InstancePtr, u32 RegisterValue)******************************************************************************/#define XQspiPs_SetSlaveIdle(InstancePtr, RegisterValue) \ XQspiPs_Out32(((InstancePtr)->Config.BaseAddress) + \ XQSPIPS_SICR_OFFSET, (RegisterValue))/****************************************************************************//**** Get the contents of the slave idle count register. Use the XQSPIPS_SICR_** constants defined in xqspips_hw.h to interpret the bit-mask returned.** @param InstancePtr is a pointer to the XQspiPs instance.** @return A 32-bit value representing the contents of the SIC register.** @note C-Style signature:* u32 XQspiPs_GetSlaveIdle(XQspiPs *InstancePtr)******************************************************************************/#define XQspiPs_GetSlaveIdle(InstancePtr) \ XQspiPs_In32(((InstancePtr)->Config.BaseAddress) + \ XQSPIPS_SICR_OFFSET)/****************************************************************************//**** Set the contents of the transmit FIFO watermark register.** @param InstancePtr is a pointer to the XQspiPs instance.* @param RegisterValue is the value to be writen, valid values are 0-15.** @return None.** @note* C-Style signature:* void XQspiPs_GetTXWatermark(XQspiPs *InstancePtr, u32 RegisterValue)******************************************************************************/#define XQspiPs_SetTXWatermark(InstancePtr, RegisterValue) \ XQspiPs_Out32(((InstancePtr)->Config.BaseAddress) + \ XQSPIPS_TXWR_OFFSET, (RegisterValue))/****************************************************************************//**** Get the contents of the transmit FIFO watermark register.* Use the XQSPIPS_TXWR_* constants defined xqspips_hw.h to interpret* the bit-mask returned.** @param InstancePtr is a pointer to the XQspiPs instance.** @return A 32-bit value representing the contents of the TXWR register.** @note C-Style signature:* u32 XQspiPs_GetTXWatermark(u32 *InstancePtr)******************************************************************************/#define XQspiPs_GetTXWatermark(InstancePtr) \ XQspiPs_In32((InstancePtr->Config.BaseAddress) + XQSPIPS_TXWR_OFFSET)/****************************************************************************//**** Enable the device and uninhibit master transactions.** @param BaseAddress is the base address of the device** @return None.** @note C-Style signature:* void XQspiPs_Enable(u32 BaseAddress)******************************************************************************/#define XQspiPs_Enable(BaseAddress) \ XQspiPs_Out32((BaseAddress) + XQSPIPS_ER_OFFSET, \ XQSPIPS_ER_ENABLE_MASK)/****************************************************************************//**** Disable the device.** @param BaseAddress is the base address of the device.** @return None.** @note C-Style signature:* void XQspiPs_Disable(u32 BaseAddress)******************************************************************************/#define XQspiPs_Disable(BaseAddress) \ XQspiPs_Out32((BaseAddress) + XQSPIPS_ER_OFFSET, 0)/****************************************************************************//**** Set the contents of the Linear QSPI Configuration register.** @param InstancePtr is a pointer to the XQspiPs instance.* @param RegisterValue is the value to be writen to the Linear QSPI* configuration register.** @return None.** @note* C-Style signature:* void XQspiPs_SetLqspiConfigReg(XQspiPs *InstancePtr,* u32 RegisterValue)******************************************************************************/#define XQspiPs_SetLqspiConfigReg(InstancePtr, RegisterValue) \ XQspiPs_Out32(((InstancePtr)->Config.BaseAddress) + \ XQSPIPS_LQSPI_CR_OFFSET, (RegisterValue))/****************************************************************************//**** Get the contents of the Linear QSPI Configuration register.** @param InstancePtr is a pointer to the XQspiPs instance.** @return A 32-bit value representing the contents of the LQSPI Config* register.** @note C-Style signature:* u32 XQspiPs_GetLqspiConfigReg(u32 *InstancePtr)******************************************************************************/#define XQspiPs_GetLqspiConfigReg(InstancePtr) \ XQspiPs_In32((InstancePtr->Config.BaseAddress) + \ XQSPIPS_LQSPI_CR_OFFSET)/************************** Function Prototypes ******************************//* * Initialization function, implemented in xqspips_sinit.c */XQspiPs_Config *XQspiPs_LookupConfig(u16 DeviceId);/* * Functions implemented in xqspips.c */int XQspiPs_CfgInitialize(XQspiPs *InstancePtr, XQspiPs_Config * Config, u32 EffectiveAddr);void XQspiPs_Reset(XQspiPs *InstancePtr);void XQspiPs_Abort(XQspiPs *InstancePtr);int XQspiPs_Transfer(XQspiPs *InstancePtr, u8 *SendBufPtr, u8 *RecvBufPtr, unsigned ByteCount, int IsInst);int XQspiPs_PolledTransfer(XQspiPs *InstancePtr, u8 *SendBufPtr, u8 *RecvBufPtr, unsigned ByteCount, int IsInst);void XQspiPs_LqspiRead(XQspiPs *InstancePtr, u8 *RecvBufPtr, u32 Address, unsigned ByteCount);int XQspiPs_SetSlaveSelect(XQspiPs *InstancePtr, u8 SelectValue);u8 XQspiPs_GetSlaveSelect(XQspiPs *InstancePtr);void XQspiPs_SetStatusHandler(XQspiPs *InstancePtr, void *CallBackRef, XQspiPs_StatusHandler FuncPtr);void XQspiPs_InterruptHandler(void *InstancePtr);/* * Functions for selftest, in xqspips_selftest.c */int XQspiPs_SelfTest(XQspiPs *InstancePtr);/* * Functions for options, in xqspips_options.c */int XQspiPs_SetOptions(XQspiPs *InstancePtr, u32 Options);u32 XQspiPs_GetOptions(XQspiPs *InstancePtr);int XQspiPs_SetClkPrescaler(XQspiPs *InstancePtr, u8 Prescaler);u8 XQspiPs_GetClkPrescaler(XQspiPs *InstancePtr);int XQspiPs_SetDelays(XQspiPs *InstancePtr, u8 DelayBtwn, u8 DelayAfter, u8 DelayInit);void XQspiPs_GetDelays(XQspiPs *InstancePtr, u8 *DelayBtwn, u8 *DelayAfter, u8 *DelayInit);#ifdef __cplusplus}#endif#endif /* end of protection macro */
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