ps7_init.h

自学ZedBoard：使用IP通过ARM PS访问FPGA（源代码）

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/**
*
* @file ps7_init.h
*
* This file can be included in FSBL code
* to get prototype of ps7_init() function
* and error codes
*
*****************************************************************************/




/* Most probably .. this will be defined elsewhere...
 */
//typedef unsigned int  u32;


/** do we need to make this name more unique ? **/
//extern u32 ps7_init_data[];
extern unsigned long ps7_ddr_init_data[];
extern unsigned long ps7_mio_init_data[];
extern unsigned long ps7_pll_init_data[];
extern unsigned long ps7_clock_init_data[];
extern unsigned long ps7_peripherals_init_data[];



#define OPCODE_EXIT       0U
#define OPCODE_CLEAR      1U
#define OPCODE_WRITE      2U
#define OPCODE_MASKWRITE  3U
#define OPCODE_MASKPOLL   4U


/* Encode number of arguments in last nibble */
#define EMIT_EXIT()                   ( (OPCODE_EXIT      << 4 ) | 0 )
#define EMIT_CLEAR(addr)              ( (OPCODE_CLEAR     << 4 ) | 1 ) , addr
#define EMIT_WRITE(addr,val)          ( (OPCODE_WRITE     << 4 ) | 2 ) , addr, val
#define EMIT_MASKWRITE(addr,mask,val) ( (OPCODE_MASKWRITE << 4 ) | 3 ) , addr, mask, val
#define EMIT_MASKPOLL(addr,mask)      ( (OPCODE_MASKPOLL  << 4 ) | 2 ) , addr, mask



/* Returns codes  of PS7_Init */
#define PS7_INIT_SUCCESS   (0)    // 0 is success in good old C
#define PS7_INIT_CORRUPT   (1)    // 1 the data is corrupted, and slcr reg are in corrupted state now
#define PS7_INIT_TIMEOUT   (2)    // 1 when a poll operation timed out

/* Freq of all peripherals */

#define APU_FREQ  666666666
#define DDR_FREQ  533333313
#define DCI_FREQ  10159000
#define QSPI_FREQ  200000000
#define SMC_FREQ  100000000
#define ENET0_FREQ  25000000
#define ENET1_FREQ  125000000
#define USB0_FREQ  60000000
#define USB1_FREQ  60000000
#define SDIO_FREQ  50000000
#define UART_FREQ  50000000
#define SPI_FREQ  166666666
#define I2C_FREQ  111111115
#define WDT_FREQ  133333333
#define TTC_FREQ  50000000
#define CAN_FREQ  23809500
#define PCAP_FREQ  200000000
#define TPIU_FREQ  0
#define FPGA0_FREQ  50000000
#define FPGA1_FREQ  50000000
#define FPGA2_FREQ  50000000
#define FPGA3_FREQ  50000000

int ps7_config( unsigned long*);
int ps7_init();