led.map.rpt

cpld系统 EWB Quartus2编译 电子综合设计试验箱程序

; Perform gate-level register retiming                                           ; Off                ; Off                ;
; Allow register retiming to trade off Tsu/Tco with Fmax                         ; On                 ; On                 ;
; Auto ROM Replacement                                                           ; On                 ; On                 ;
; Auto RAM Replacement                                                           ; On                 ; On                 ;
; Auto Shift Register Replacement                                                ; Auto               ; Auto               ;
; Auto Clock Enable Replacement                                                  ; On                 ; On                 ;
; Allow Synchronous Control Signals                                              ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                                         ; Off                ; Off                ;
; Auto RAM Block Balancing                                                       ; On                 ; On                 ;
; Auto RAM to Logic Cell Conversion                                              ; Off                ; Off                ;
; Auto Resource Sharing                                                          ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                                             ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                                             ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                                  ; Off                ; Off                ;
; Ignore translate_off and synthesis_off directives                              ; Off                ; Off                ;
; Show Parameter Settings Tables in Synthesis Report                             ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                                             ; Off                ; Off                ;
; Retiming Meta-Stability Register Sequence Length                               ; 2                  ; 2                  ;
; PowerPlay Power Optimization                                                   ; Normal compilation ; Normal compilation ;
; HDL message level                                                              ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages                                ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report                       ; 100                ; 100                ;
; Clock MUX Protection                                                           ; On                 ; On                 ;
; Block Design Naming                                                            ; Auto               ; Auto               ;
+--------------------------------------------------------------------------------+--------------------+--------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                                               ;
+-----------------------------------+-----------------+------------------------------------+---------------------------------------------------------------------------+
; File Name with User-Entered Path  ; Used in Netlist ; File Type                          ; File Name with Absolute Path                                              ;
+-----------------------------------+-----------------+------------------------------------+---------------------------------------------------------------------------+
; LED.vhd                           ; yes             ; User VHDL File                     ; C:/altera/Hengdun/LED/LED.vhd                                             ;
; Block1.bdf                        ; yes             ; User Block Diagram/Schematic File  ; C:/altera/Hengdun/LED/Block1.bdf                                          ;
; LCD.vhd                           ; yes             ; Other                              ; C:/altera/Hengdun/LED/LCD.vhd                                             ;
; Data.vhd                          ; yes             ; Other                              ; C:/altera/Hengdun/LED/Data.vhd                                            ;
; EN.vhd                            ; yes             ; Other                              ; C:/altera/Hengdun/LED/EN.vhd                                              ;
; RS.vhd                            ; yes             ; Other                              ; C:/altera/Hengdun/LED/RS.vhd                                              ;
; RW.vhd                            ; yes             ; Other                              ; C:/altera/Hengdun/LED/RW.vhd                                              ;
; cpu.vhd                           ; yes             ; Encrypted File                     ; C:/altera/Hengdun/LED/cpu.vhd                                             ;
; cpu_test_bench.vhd                ; yes             ; Other                              ; C:/altera/Hengdun/LED/cpu_test_bench.vhd                                  ;
; altsyncram.tdf                    ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf               ;
; stratix_ram_block.inc             ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/stratix_ram_block.inc        ;
; lpm_mux.inc                       ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/lpm_mux.inc                  ;
; lpm_decode.inc                    ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/lpm_decode.inc               ;
; aglobal72.inc                     ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/aglobal72.inc                ;
; a_rdenreg.inc                     ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/a_rdenreg.inc                ;
; altrom.inc                        ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/altrom.inc                   ;
; altram.inc                        ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/altram.inc                   ;
; altdpram.inc                      ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/altdpram.inc                 ;
; altqpram.inc                      ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/altqpram.inc                 ;
; db/altsyncram_0922.tdf            ; yes             ; Auto-Generated Megafunction        ; C:/altera/Hengdun/LED/db/altsyncram_0922.tdf                              ;
; db/altsyncram_bp62.tdf            ; yes             ; Auto-Generated Megafunction        ; C:/altera/Hengdun/LED/db/altsyncram_bp62.tdf                              ;
; db/altsyncram_stv1.tdf            ; yes             ; Auto-Generated Megafunction        ; C:/altera/Hengdun/LED/db/altsyncram_stv1.tdf                              ;
; cpu_jtag_debug_module_wrapper.vhd ; yes             ; Other                              ; C:/altera/Hengdun/LED/cpu_jtag_debug_module_wrapper.vhd                   ;
; cpu_jtag_debug_module.vhd         ; yes             ; Other                              ; C:/altera/Hengdun/LED/cpu_jtag_debug_module.vhd                           ;
; onchip_mem.vhd                    ; yes             ; Other                              ; C:/altera/Hengdun/LED/onchip_mem.vhd                                      ;
; db/altsyncram_u8b1.tdf            ; yes             ; Auto-Generated Megafunction        ; C:/altera/Hengdun/LED/db/altsyncram_u8b1.tdf                              ;
; sld_signaltap.vhd                 ; yes             ; Encrypted Megafunction             ; c:/altera/72/quartus/libraries/megafunctions/sld_signaltap.vhd            ;
; sld_ela_control.vhd               ; yes             ; Encrypted Megafunction             ; c:/altera/72/quartus/libraries/megafunctions/sld_ela_control.vhd          ;
; LPM_SHIFTREG.tdf                  ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/LPM_SHIFTREG.tdf             ;
; lpm_constant.inc                  ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/lpm_constant.inc             ;
; dffeea.inc                        ; yes             ; Megafunction                       ; c:/altera/72/quartus/libraries/megafunctions/dffeea.inc                   ;
; sld_mbpmg.vhd                     ; yes             ; Encrypted Megafunction             ; c:/altera/72/quartus/libraries/megafunctions/sld_mbpmg.vhd                ;
; sld_ela_trigger_flow_mgr.vhd      ; yes             ; Encrypted Megafunction             ; c:/altera/72/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd ;
; sld_buffer_manager.vhd            ; yes             ; Encrypted Megafunction             ; c:/altera/72/quartus/libraries/megafunctions/sld_buffer_manager.vhd       ;