led.tcl

cpld系统 EWB Quartus2编译 电子综合设计试验箱程序

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.

# Quartus II: Generate Tcl File for Project
# File: LED.tcl
# Generated on: Sat May 03 14:52:43 2008

# Load Quartus II Tcl Project package
package require ::quartus::project

set need_to_close_project 0
set make_assignments 1

# Check that the right project is open
if {[is_project_open]} {
	if {[string compare $quartus(project) "LED"]} {
		puts "Project LED is not open"
		set make_assignments 0
	}
} else {
	# Only open if not already open
	if {[project_exists LED]} {
		project_open -revision LED LED
	} else {
		project_new -revision LED LED
	}
	set need_to_close_project 1
}

# Make assignments
if {$make_assignments} {
	set_global_assignment -name FAMILY Cyclone
	set_global_assignment -name DEVICE EP1C3T144C8
	set_global_assignment -name TOP_LEVEL_ENTITY Block1
	set_global_assignment -name ORIGINAL_QUARTUS_VERSION "7.2 SP3"
	set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:35:39  APRIL 04, 2008"
	set_global_assignment -name LAST_QUARTUS_VERSION "7.2 SP3"
	set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
	set_global_assignment -name SIMULATION_MODE FUNCTIONAL
	set_global_assignment -name VHDL_FILE LED.vhd
	set_global_assignment -name VECTOR_WAVEFORM_FILE LED.vwf
	set_global_assignment -name TCL_SCRIPT_FILE LED.tcl
	set_global_assignment -name INCREMENTAL_COMPILATION OFF
	set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
	set_global_assignment -name VHDL_FILE rom.vhd
	set_global_assignment -name BDF_FILE Block1.bdf
	set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
	set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
	set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
	set_location_assignment PIN_17 -to clk
	set_location_assignment PIN_70 -to led[7]
	set_location_assignment PIN_72 -to led[6]
	set_location_assignment PIN_74 -to led[5]
	set_location_assignment PIN_76 -to led[4]
	set_location_assignment PIN_71 -to led[3]
	set_location_assignment PIN_73 -to led[2]
	set_location_assignment PIN_75 -to led[1]
	set_location_assignment PIN_106 -to DAC[0]
	set_location_assignment PIN_107 -to DAC[1]
	set_location_assignment PIN_108 -to DAC[2]
	set_location_assignment PIN_109 -to DAC[3]
	set_location_assignment PIN_110 -to DAC[4]
	set_location_assignment PIN_111 -to DAC[5]
	set_location_assignment PIN_112 -to DAC[6]
	set_location_assignment PIN_113 -to DAC[7]

	# Commit assignments
	export_assignments

	# Close project
	if {$need_to_close_project} {
		project_close
	}
}