📄 shx.opj
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(ExpressProject "shx"
(ProjectVersion "19981106")
(ProjectType "PCB")
(Folder "Design Resources"
(Folder "Library")
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(Type "Schematic Design"))
(BuildFileAddedOrDeleted "x")
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(DRC_SDT_Compatibility "FALSE")
(DRC_Report_Off-grid_Objects "FALSE")
(DRC_Check_Unconnected_Nets "TRUE")
(DRC_Check_for_Misleading_TAP "FALSE")
(DRC_Visible_Power_pins "FALSE")
(DRC_Report_Netnames "FALSE")
(DRC_View_Output "FALSE")
(DRC_Report_File
"C:\Documents and Settings\Administrator\桌面\XWJ时小霞\aaa.DRC")
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(Board_sim_option "VHDL_flow")
("Create Allegro Netlist" "TRUE")
("Allegro Netlist Directory"
"C:\DOCUMENTS AND SETTINGS\ADMINISTRATOR\桌面\XWJ时小霞\ALLEGRO")
("View Allegro Netlist Files" "FALSE")
("Update Allegro Board" "FALSE")
("Allegro Netlist Output Board File" "allegro\shx.brd")
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("Allegro Netlist Place Changed Component" "ALWAYS_REPLACE")
("Allegro Netlist Open Board in Allegro" "ALLEGRO")
("Allegro Setup Configuration File"
"C:\Cadence\SPB_16.2\tools\capture\allegro.cfg")
("Allegro Setup Backup Versions" "3")
("Allegro Netlist Combine Property String" "PCB Footprint")
("Allegro Netlist Ignore Fixed Property" "FALSE")
("Allegro Netlist User Defined Property" "FALSE")
(Netlist_TAB "0")
(GATE_&_PIN_SWAP_Scope "0")
(GATE_&_PIN_SWAP_File_Name "E:\CADENCE资料\DSP CIS\SHX.SWP")
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(Annotate_type "Default")
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(Folder "Outputs"
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(File ".\allegro\pstchip.dat"
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(DisplayName "pstchip.dat")))
(Folder "Referenced Projects")
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(Path "Design Resources"
"C:\Documents and Settings\dudu\桌面\17章\17\17.1.2-17.1.3 原理图的绘制与完善\shx.dsn")
(Path "Design Resources"
"C:\Documents and Settings\dudu\桌面\17章\17\17.1.2-17.1.3 原理图的绘制与完善\shx.dsn"
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(Path "Outputs")
(Select "Design Resources"
"C:\Documents and Settings\dudu\桌面\17章\17\17.1.2-17.1.3 原理图的绘制与完善\shx.dsn"
"SCHEMATIC1" "PAGE1"))
(HierarchyView)
(Doc
(Type "COrCapturePMDoc")
(Frame
(Placement "44 0 1 -1 -1 -4 -30 0 200 0 364"))
(Tab 0))
(Doc
(Type "COrSchematicDoc")
(Frame
(Placement "44 2 3 -1 -1 -4 -30 44 936 58 486")
(Scroll "0 0")
(Zoom "100")
(Occurrence "/"))
(Path
"C:\DOCUMENTS AND SETTINGS\DUDU\桌面\17章\17\17.1.2-17.1.3 原理图的绘制与完善\SHX.DSN")
(Schematic "SCHEMATIC1")
(Page "PAGE1")))
(MPSSessionName "dudu")
(ISPCBBASICLICENSE "false"))
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