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# Component C17 Selected.
# Component C16 Selected.
# Component C15 Selected.
# Component C1 Selected.
# Component U23 Selected.
# Component U20 Selected.
# Component U3 Selected.
# Component U2 Selected.
# Component U1 Selected.
# Component U6 Selected.
set route_diagonal 4
grid wire 0.010000 (direction x) (offset 0.000000)
grid wire 0.010000 (direction y) (offset 0.000000)
grid via 0.010000 (direction x) (offset 0.000000)
grid via 0.010000 (direction y) (offset 0.000000)
protect all wires
# All Wires Protected.
direction TOP horizontal
select layer TOP
unprotect layer_wires TOP
# Wires on layer TOP were Unprotected.
direction BOTTOM vertical
select layer BOTTOM
unprotect layer_wires BOTTOM
# Wires on layer BOTTOM were Unprotected.
cost via 100
set turbo_stagger on
limit outside 32.000000
rule pcb (patterns_allowed trombone accordion)
set pattern_stacking on
rule pcb (sawtooth_amplitude -1 -1)
rule pcb (sawtooth_gap -1)
rule pcb (accordion_amplitude -1 -1)
rule pcb (accordion_gap -1)
rule pcb (trombone_run_length -1)
rule pcb (trombone_gap -1)
route 25 1
# Current time = Mon May 04 11:05:38 2009
#
# VIA TOP BOTTOM
#
# TOP ------ VIA
# BOTTOM VIA ------
#
#
# Design Rules --------------------------------------------
# Via Grid 0.0100 with offset 0.0000
# Layer TOP Horz Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# Layer BOTTOM Vert Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
#
# Wiring Statistics ----------------- F:/wenjian/第十一章/自动布线\plane.dsn
# Nets 184 Connections 572 Unroutes 572
# Signal Layers 2 Power Layers 2
# Wire Junctions 0, at vias 0 Total Vias 0
# Percent Connected 0.00
# Manhattan Length 338257.0000 Horizontal 160989.9200 Vertical 177267.0800
# Routed Length 0.0000 Horizontal 0.0000 Vertical 0.0000
# Ratio Actual / Manhattan 0.0000
# Unconnected Length 338257.0000 Horizontal 149956.0000 Vertical 188301.0000
# 0 bend points have been removed.
# 0 bend points have been removed.
# 0 bend points have been removed.
# Start Route Pass 1 of 25
# Routing 572 wires.
stop
# Total Conflicts: 0 (Cross: 0, Clear: 0, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 570
# Attempts 1 Successes 1 Failures 0 Vias 0
# Cpu Time = 0:00:00 Elapsed Time = 0:00:00
# End Pass 1 of 25
# Cpu Time = 0:00:01 Elapsed Time = 0:00:00
#
# Design Rules --------------------------------------------
# Via Grid 0.0100 with offset 0.0000
# Layer TOP Horz Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# Layer BOTTOM Vert Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# ROUTING HISTORY ================================================================
# Pass | Conflicts | | | | | |Red| CPU Time |
# Name |No.| Cross| Clear|Fail|Unrte| Vias|XTalk|Len.| % | Pass | Total |
#----------+---+------+------+----+-----+-----+-----+----+---+---------+---------|
# Route | 1| 787| 110| 241| 249| 4| 0| 0| 0| 0:00:03| 0:00:03|
# Route | 2| 868| 300| 263| 221| 8| 0| 0| 0| 0:00:05| 0:00:08|
# Route | 3| 874| 330| 299| 213| 9| 0| 0| 0| 0:00:07| 0:00:15|
# Route | 4| 819| 309| 253| 201| 19| 0| 0| 6| 0:00:06| 0:00:21|
# Route | 5| 888| 289| 256| 196| 15| 0| 0| 0| 0:00:08| 0:00:29|
# Route | 6| 641| 66| 218| 223| 20| 0| 0| 39| 0:00:07| 0:00:36|
# Route | 7| 571| 41| 212| 222| 18| 0| 0| 13| 0:00:07| 0:00:43|
# Route | 8| 641| 91| 221| 211| 16| 0| 0| 0| 0:00:06| 0:00:49|
# Route | 9| 612| 122| 220| 215| 21| 0| 0| 0| 0:00:09| 0:00:58|
# Route | 10| 516| 22| 208| 219| 20| 0| 0| 26| 0:00:07| 0:01:05|
# Route | 11| 563| 34| 45| 215| 22| 0| 0| 0| 0:00:03| 0:01:08|
# Route | 12| 555| 40| 49| 215| 23| 0| 0| 0| 0:00:03| 0:01:11|
# Route | 13| 495| 36| 51| 219| 25| 0| 0| 10| 0:00:03| 0:01:14|
# Route | 14| 390| 20| 48| 221| 25| 0| 0| 22| 0:00:03| 0:01:17|
# Route | 15| 373| 19| 48| 224| 25| 0| 0| 4| 0:00:03| 0:01:20|
# Route | 16| 371| 28| 51| 224| 26| 0| 0| 0| 0:00:03| 0:01:23|
# Route | 17| 363| 17| 45| 226| 26| 0| 0| 4| 0:00:02| 0:01:25|
# Route | 18| 382| 17| 44| 224| 26| 0| 0| 0| 0:00:03| 0:01:28|
# Route | 19| 346| 18| 47| 227| 26| 0| 0| 8| 0:00:03| 0:01:31|
# Route | 20| 320| 22| 213| 223| 34| 0| 0| 6| 0:00:07| 0:01:38|
# Route | 21| 408| 27| 208| 214| 36| 0| 0| 0| 0:00:06| 0:01:44|
# Route | 22| 333| 27| 209| 219| 37| 0| 0| 17| 0:00:05| 0:01:49|
# Route | 23| 358| 36| 205| 216| 37| 0| 0| 0| 0:00:07| 0:01:56|
# Route | 24| 381| 31| 213| 216| 37| 0| 0| 0| 0:00:06| 0:02:02|
# Route | 25| 285| 21| 209| 226| 37| 0| 0| 25| 0:00:06| 0:02:08|
# Clean | 26| 285| 21| 394| 226| 37| 0| 0| | 0:00:02| 0:02:10|
# Clean | 27| 285| 21| 394| 226| 37| 0| 0| | 0:00:02| 0:02:12|
# Critic | 27| 0| 0| 0| 226| 37| 0| 0| | 0:00:00| 0:02:12|
# Filter | 28| 78| 7| 255| 275| 37| 0| 0| 72| 0:00:02| 0:02:14|
# Filter | 29| 5| 0| 313| 339| 36| 0| 0| 94| 0:00:02| 0:02:16|
# Center | 29| 0| 0| 0| 339| 36| 0| 0| | 0:00:00| 0:02:16|
# Spread | 29| 5| 0| 0| 339| 36| 0| 0| | 0:00:00| 0:02:16|
# Miter | 29| 5| 2| 0| 339| 36| 0| 0| | 0:00:04| 0:02:20|
# Delete | 29| 0| 0| 0| 341| 32| 0| 0| | 0:00:00| 0:02:20|
# Delete | 29| 0| 0| 0| 572| 0| 0| 0| | 0:00:00| 0:02:20|
# Read Rte | 29| 0| 0| 0| 572| 0| 0| 0| | 0:00:00| 0:02:20|
# Route | 30| 0| 0| 0| 570| 0| 0| 0|100| 0:00:00| 0:02:20|
# Conflicts between polygon wires and fixed objects: 0
# Stub Violations: 0
# Net Order Violations: 0
# Diffpair Uncoupled Length Violations: 0
# Diffpair Phase Tolerance Violations: 0
# Total layerset violations: 0
# Total layerset violations (exclude Fanout/Stagger/XNet Short side): 0
# Overall Routing Time: 0:02:20
#
# Wiring Statistics ----------------- F:/wenjian/第十一章/自动布线\plane.dsn
# Nets 184 Connections 572 Unroutes 570
# Signal Layers 2 Power Layers 2
# Wire Junctions 0, at vias 0 Total Vias 0
# Percent Connected 0.35
# Manhattan Length 338257.0000 Horizontal 160989.9200 Vertical 177267.0800
# Routed Length 1827.7241 Horizontal 940.0000 Vertical 898.0000
# Ratio Actual / Manhattan 0.0054
# Unconnected Length 336877.0000 Horizontal 149336.0000 Vertical 187541.0000
write routes (changed_only) (reset_changed) C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaaq03820.tmp
# Routing Written to File C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaaq03820.tmp
# Loading Do File C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaar03820.tmp ...
# All Components Unselected.
# All Nets Unselected.
set route_diagonal 4
grid wire 0.010000 (direction x) (offset 0.000000)
grid wire 0.010000 (direction y) (offset 0.000000)
grid via 0.010000 (direction x) (offset 0.000000)
grid via 0.010000 (direction y) (offset 0.000000)
protect all wires
# All Wires Protected.
direction TOP horizontal
select layer TOP
unprotect layer_wires TOP
# Wires on layer TOP were Unprotected.
direction BOTTOM vertical
select layer BOTTOM
unprotect layer_wires BOTTOM
# Wires on layer BOTTOM were Unprotected.
cost via 100
set turbo_stagger on
limit outside 32.000000
rule pcb (patterns_allowed trombone accordion)
set pattern_stacking on
rule pcb (sawtooth_amplitude -1 -1)
rule pcb (sawtooth_gap -1)
rule pcb (accordion_amplitude -1 -1)
rule pcb (accordion_gap -1)
rule pcb (trombone_run_length -1)
rule pcb (trombone_gap -1)
route 25 1
# Current time = Mon May 04 11:05:50 2009
#
# VIA TOP BOTTOM
#
# TOP ------ VIA
# BOTTOM VIA ------
#
#
# Design Rules --------------------------------------------
# Via Grid 0.0100 with offset 0.0000
# Layer TOP Horz Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# Layer BOTTOM Vert Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
#
# Wiring Statistics ----------------- F:/wenjian/第十一章/自动布线\plane.dsn
# Nets 184 Connections 572 Unroutes 570
# Signal Layers 2 Power Layers 2
# Wire Junctions 0, at vias 0 Total Vias 0
# Percent Connected 0.35
# Manhattan Length 338257.0000 Horizontal 160989.9200 Vertical 177267.0800
# Routed Length 1827.7241 Horizontal 940.0000 Vertical 898.0000
# Ratio Actual / Manhattan 0.0054
# Unconnected Length 336877.0000 Horizontal 149336.0000 Vertical 187541.0000
# 2 bend points have been removed.
# 0 bend points have been removed.
# 0 bend points have been removed.
# Start Route Pass 1 of 25
# Routing 572 wires.
# 114 bend points have been removed.
# 80 bend points have been removed.
# Total Conflicts: 815 (Cross: 713, Clear: 102, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 252
# Attempts 535 Successes 291 Failures 244 Vias 4
# Cpu Time = 0:00:04 Elapsed Time = 0:00:05
# End Pass 1 of 25
# Start Route Pass 2 of 25
# Routing 621 wires.
# 43 bend points have been removed.
# 22 bend points have been removed.
# Total Conflicts: 1115 (Cross: 823, Clear: 292, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 221
# Attempts 577 Successes 308 Failures 269 Vias 6
# Cpu Time = 0:00:05 Elapsed Time = 0:00:06
# Conflict Reduction -0.3681
# End Pass 2 of 25
# Start Route Pass 3 of 25
# Routing 643 wires.
# 39 bend points have been removed.
# 32 bend points have been removed.
# Total Conflicts: 1086 (Cross: 777, Clear: 309, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 214
# Attempts 596 Successes 291 Failures 305 Vias 13
# Cpu Time = 0:00:08 Elapsed Time = 0:00:09
# Conflict Reduction 0.0260
# End Pass 3 of 25
# Start Route Pass 4 of 25
# Routing 651 wires.
# 44 bend points have been removed.
# 26 bend points have been removed.
# Total Conflicts: 1132 (Cross: 829, Clear: 303, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 195
# Attempts 598 Successes 351 Failures 247 Vias 21
# Cpu Time = 0:00:08 Elapsed Time = 0:00:08
# Conflict Reduction -0.0424
# End Pass 4 of 25
# Start Route Pass 5 of 25
# Routing 675 wires.
# 40 bend points have been removed.
# 19 bend points have been removed.
# Total Conflicts: 1163 (Cross: 888, Clear: 275, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 191
# Attempts 623 Successes 367 Failures 256 Vias 16
# Cpu Time = 0:00:08 Elapsed Time = 0:00:08
# Conflict Reduction -0.0274
# End Pass 5 of 25
# 0 bend points have been removed.
# 0 bend points have been removed.
# Start Route Pass 6 of 25
# Routing 569 wires.
# 12 bend points have been removed.
# 16 bend points have been removed.
# Total Conflicts: 445 (Cross: 406, Clear: 39, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 230
# Attempts 526 Successes 301 Failures 225 Vias 16
# Cpu Time = 0:00:07 Elapsed Time = 0:00:07
# End Pass 6 of 25
# Start Route Pass 7 of 25
# Routing 496 wires.
# 8 bend points have been removed.
# 9 bend points have been removed.
# Total Conflicts: 509 (Cross: 453, Clear: 56, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 218
# Attempts 458 Successes 239 Failures 219 Vias 17
# Cpu Time = 0:00:06 Elapsed Time = 0:00:07
# End Pass 7 of 25
# Start Route Pass 8 of 25
# Routing 530 wires.
# 4 bend points have been removed.
# 7 bend points have been removed.
# Total Conflicts: 900 (Cross: 670, Clear: 230, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 189
# Attempts 487 Successes 267 Failures 220 Vias 24
# Cpu Time = 0:00:09 Elapsed Time = 0:00:09
# End Pass 8 of 25
# Start Route Pass 9 of 25
# Routing 527 wires.
# 4 bend points have been removed.
# 7 bend points have been removed.
# Total Conflicts: 364 (Cross: 318, Clear: 46, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 223
# Attempts 488 Successes 262 Failures 226 Vias 26
# Cpu Time = 0:00:07 Elapsed Time = 0:00:10
# End Pass 9 of 25
# Start Route Pass 10 of 25
# Routing 520 wires.
# 17 bend points have been removed.
# 4 bend points have been removed.
# Total Conflicts: 362 (Cross: 309, Clear: 53, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 227
# Attempts 483 Successes 259 Failures 224 Vias 28
# Cpu Time = 0:00:07 Elapsed Time = 0:00:08
# End Pass 10 of 25
# Start Route Pass 11 of 25
# Routing 474 wires.
# 3 bend points have been removed.
# 12 bend points have been removed.
# Total Conflicts: 432 (Cross: 374, Clear: 58, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 218
# Attempts 268 Successes 221 Failures 47 Vias 28
# Cpu Time = 0:00:04 Elapsed Time = 0:00:04
# End Pass 11 of 25
# Start Route Pass 12 of 25
# Routing 528 wires.
# 3 bend points have been removed.
# 7 bend points have been removed.
# Total Conflicts: 358 (Cross: 307, Clear: 51, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 225
# Attempts 323 Successes 273 Failures 50 Vias 26
# Cpu Time = 0:00:03 Elapsed Time = 0:00:03
# End Pass 12 of 25
# Start Route Pass 13 of 25
# Routing 473 wires.
# 3 bend points have been removed.
# 3 bend points have been removed.
# Total Conflicts: 401 (Cross: 351, Clear: 50, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 219
# Attempts 267 Successes 225 Failures 42 Vias 26
# Cpu Time = 0:00:02 Elapsed Time = 0:00:03
# End Pass 13 of 25
# Start Route Pass 14 of 25
# Routing 533 wires.
# 6 bend points have been removed.
# 8 bend points have been removed.
# Total Conflicts: 364 (Cross: 312, Clear: 52, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 224
# Attempts 312 Successes 278 Failures 34 Vias 27
# Cpu Time = 0:00:03 Elapsed Time = 0:00:02
# End Pass 14 of 25
# Start Route Pass 15 of 25
# Routing 463 wires.
# 8 bend points have been removed.
# 11 bend points have been removed.
# Total Conflicts: 328 (Cross: 273, Clear: 55, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 225
# Attempts 256 Successes 207 Failures 49 Vias 27
# Cpu Time = 0:00:03 Elapsed Time = 0:00:04
# End Pass 15 of 25
# Start Route Pass 16 of 25
# Routing 507 wires.
# 4 bend points have been removed.
# 4 bend points have been removed.
# Total Conflicts: 364 (Cross: 310, Clear: 54, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 221
# Attempts 299 Successes 252 Failures 47 Vias 27
# Cpu Time = 0:00:03 Elapsed Time = 0:00:03
# End Pass 16 of 25
# Start Route Pass 17 of 25
# Routing ⌨️ 快捷键说明
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