📄 em78p468.inc
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mICIE == 0x80 ; Pin Change Wake Up Interrupt Enable Bit
mLPWTE == 0x40 ; Low Pulse Width Timer Interrupt Enable Bit
mHPWTE == 0x20 ; High Pulse Width Timer Interrupt Enable Bit
mCNT2E == 0x10 ; Counter 2 Interrupt Enable Bit
mCNT1E == 0x08 ; Counter 2 Interrupt Enable Bit
mINT1E == 0x04 ; INT1 Interrupt Enable Bit
mINT0E == 0x02 ; INT0 Interrupt Enable Bit
mTCIE == 0x01 ; TCC Interrupt Enable Bit
;}
;
;==============================================================;
; Register IOC61~IOCF1 ;
; Must be Set Bit0 of R5 to "1" and use IOW and IOR Instruction;
;==============================================================;
;
; Wake up control Register and IROUT Sink Current Control
;
IOC61 == 0X06
WUCR == 0X06
;
;{
mIROCS == 0x80 ; IROUT/P5.7 Sink current Set Bit.
; "0" : Normal
; "1" : Double Current
; bit 6~4 not use
mWUE8HB == 0x08 ; P8.4~7 Pin Change Wake up Function.
; "0" : Enable
; "1" : Disable
mWUE8LB == 0x04 ; P8.0~3 Pin Change Wake up Function.
; "0" : Enable
; "1" : Disable
mWUE6HB == 0x02 ; P6.4~7 Pin Change Wake up Function.
; "0" : Enable
; "1" : Disable
mWUE6LB == 0x01 ; P6.0~3 Pin Change Wake up Function.
; "0" : Enable
; "1" : Disable
;}
;
; TCC Control Register and INT0 Edge Set
;
IOC71 == 0X07
TCCCR == 0X07
;
;{
mINT_EDGE == 0x80 ; INT0 Edge Select Bit.
; "0" : Rising Edge
; "1" : Falling Edge
mINT == 0x40 ; INT Enable Flag
mTS == 0x20 ; TCC Signal Source.
; "0" : Internal Instruction Cycle Clock
; "1" : Transition on TCC Pin.
mTE == 0x10 ; TCC Signal Edge Select bit.
; "0" : Rising Edge
; "1" : Falling Edge
mPSRE == 0x08 ; Prescaler Register Enable Bit.
; "0" : TCC Rate 1:1,
; "1" : Depend on Table
mTCCP2 == 0x04 ; TCC Prescaler Select Bit[2]
mTCCP1 == 0x02 ; TCC Prescaler Select Bit[1]
mTCCP0 == 0x01 ; TCC Prescaler Select Bit[0]
;
; |----|-----|-----|-----|----------|
; |PSRE|TCCP2|TCCP1|TCCP0| TCC rate |
; |----|-----|-----|-----|----------|
; | 0 | x | x | x | 1:1 |
; | 1 | 0 | 0 | 0 | 1:2 |
; | 1 | 0 | 0 | 1 | 1:4 |
; | 1 | 0 | 1 | 0 | 1:8 |
; | 1 | 0 | 1 | 1 | 1:16 |
; | 1 | 1 | 0 | 0 | 1:32 |
; | 1 | 1 | 0 | 1 | 1:64 |
; | 1 | 1 | 1 | 0 | 1:128 |
; | 1 | 1 | 1 | 1 | 1:256 |
; |----|-----|-----|-----|----------|
;}
;
; WDT(Watch Dog Timer) Control Register
;
IOC81 == 0x08
WDTCR == 0x08
;
;{
; bit 7~4 not use
mWDTE == 0x08 ; WDT Enable Bit."0":Disable,"1":Enable
mWDTP2 == 0x04 ; WDT Prescaler Select Bit[2]
mWDTP1 == 0x02 ; WDT Prescaler Select Bit[1]
mWDTP0 == 0x01 ; WDT Prescaler Select Bit[0]
;
; |-----|-----|-----|----------|
; |WDTP2|WDTP1|WDTP0| WDT rate |
; |-----|-----|-----|----------|
; | 0 | 0 | 0 | 1:1 |
; | 0 | 0 | 1 | 1:2 |
; | 0 | 1 | 0 | 1:4 |
; | 0 | 1 | 1 | 1:8 |
; | 1 | 0 | 0 | 1:16 |
; | 1 | 0 | 1 | 1:32 |
; | 1 | 1 | 0 | 1:64 |
; | 1 | 1 | 1 | 1:128 |
; |-----|-----|-----|----------|
;}
;
; Counter1 and Counter2 Control Register
;
IOC91 == 0x09
CNT12CR == 0x09
;
;{
mCNT2S == 0x80 ; Counter 2 Clock Source select bit.
; "0" : Fs (sub oscillator)
; "1" : Fm (main oscillator)
mCNT2P2 == 0x40 ; Counter 2 Prescaler Select Bit[2]
mCNT2P1 == 0x20 ; Counter 2 Prescaler Select Bit[1]
mCNT2P0 == 0x10 ; Counter 2 Prescaler Select Bit[0]
;
; |------|------|------|----------------|
; |CNT2P2|CNT2P1|CNT2P0| Counter2 Scaler|
; |------|------|------|----------------|
; | 0 | 0 | 0 | 1:2 |
; | 0 | 0 | 1 | 1:4 |
; | 0 | 1 | 0 | 1:8 |
; | 0 | 1 | 1 | 1:16 |
; | 1 | 0 | 0 | 1:32 |
; | 1 | 0 | 1 | 1:64 |
; | 1 | 1 | 0 | 1:128 |
; | 1 | 1 | 1 | 1:256 |
; |------|------|------|----------------|
;
mCNT1S == 0x08 ; Counter 1 Clock Source select bit.
; "0" : Fs (sub oscillator)
; "1" : Fm (main oscillator)
mCNT1P2 == 0x04 ; Counter 1 Prescaler Select Bit[2]
mCNT1P1 == 0x02 ; Counter 1 Prescaler Select Bit[1]
mCNT1P0 == 0x01 ; Counter 1 Prescaler Select Bit[0]
;
; |------|------|------|----------------|
; |CNT1P2|CNT1P1|CNT1P0| Counter1 Scaler|
; |------|------|------|----------------|
; | 0 | 0 | 0 | 1:2 |
; | 0 | 0 | 1 | 1:4 |
; | 0 | 1 | 0 | 1:8 |
; | 0 | 1 | 1 | 1:16 |
; | 1 | 0 | 0 | 1:32 |
; | 1 | 0 | 1 | 1:64 |
; | 1 | 1 | 0 | 1:128 |
; | 1 | 1 | 1 | 1:256 |
; |------|------|------|----------------|
;}
;
; High/Low Pulse Width Timer Control Register
;
IOCA1 == 0x0A
HLPWTCR == 0x0A
;
;{
mLPWTS == 0x80 ; Low Pulse Width Timer Clock Source select.
; "0" : Fs (sub oscillator)
; "1" : Fm (main oscillator)
mLPWTP2 == 0x40 ; Low Pulse Width Timer Prescaler Select Bit[2]
mLPWTP1 == 0x20 ; Low Pulse Width Timer Prescaler Select Bit[1]
mLPWTP0 == 0x10 ; Low Pulse Width Timer Prescaler Select Bit[0]
;
; |------|------|------|----------------|
; |LPWTP2|LPWTP1|LPWTP0| LPWT Scaler |
; |------|------|------|----------------|
; | 0 | 0 | 0 | 1:2 |
; | 0 | 0 | 1 | 1:4 |
; | 0 | 1 | 0 | 1:8 |
; | 0 | 1 | 1 | 1:16 |
; | 1 | 0 | 0 | 1:32 |
; | 1 | 0 | 1 | 1:64 |
; | 1 | 1 | 0 | 1:128 |
; | 1 | 1 | 1 | 1:256 |
; |------|------|------|----------------|
;
mHPWTS == 0x08 ; High Pulse Width Timer Clock Source select.
; "0" : Fs (sub oscillator)
; "1" : Fm (main oscillator)
mHPWTP2 == 0x04 ; High Pulse Width Timer Prescaler Select Bit[2]
mHPWTP1 == 0x02 ; High Pulse Width Timer Prescaler Select Bit[1]
mHPWTP0 == 0x01 ; High Pulse Width Timer Prescaler Select Bit[0]
;
; |------|------|------|----------------|
; |HPWTP2|HPWTP1|HPWTP0| HPWT Scaler |
; |------|------|------|----------------|
; | 0 | 0 | 0 | 1:2 |
; | 0 | 0 | 1 | 1:4 |
; | 0 | 1 | 0 | 1:8 |
; | 0 | 1 | 1 | 1:16 |
; | 1 | 0 | 0 | 1:32 |
; | 1 | 0 | 1 | 1:64 |
; | 1 | 1 | 0 | 1:128 |
; | 1 | 1 | 1 | 1:256 |
; |------|------|------|----------------|
;}
;
; Port 6 Pull High Control Register
;
IOCB1 == 0X0B
P6PH == 0X0B
;
;{ ; Bit[n]="0", Disable P6.[n] Pull High Function.n=7~0
; Bit[n]="1", Enable P6.[n] Pull High Function.n=7~0
mPH67 == 0x80 ;
mPH66 == 0x40 ;
mPH65 == 0x20 ;
mPH64 == 0x10 ;
mPH63 == 0x08 ;
mPH62 == 0x04 ;
mPH61 == 0x02 ;
mPH60 == 0x01 ;
;}
;
; Port 6 Open Drain Control Register
;
IOCC1 == 0X0C
P6OD == 0X0C
;
;{ ; Bit[n]="0", Disable P6.[n] Open Drain Function. n=7~0
; Bit[n]="1", Enable P6.[n] Open Drain Function. n=7~0
mOD67 == 0x80 ;
mOD66 == 0x40 ;
mOD65 == 0x20 ;
mOD64 == 0x10 ;
mOD63 == 0x08 ;
mOD62 == 0x04 ;
mOD61 == 0x02 ;
mOD60 == 0x01 ;
;}
;
; Port 8 Pull High Control Register
;
IOCD1 == 0X0D
P8PH == 0X0D
;
;{ ; Bit[n]="0", Disable P8.[n] Pull High Function. n=7~0
; Bit[n]="1", Enable P8.[n] Pull High Function. n=7~0
mPH87 == 0x80 ;
mPH86 == 0x40 ;
mPH85 == 0x20 ;
mPH84 == 0x10 ;
mPH83 == 0x08 ;
mPH82 == 0x04 ;
mPH81 == 0x02 ;
mPH80 == 0x01 ;
;}
;
; Port 6 Pull Low Control Register
;
IOCE1 == 0X0E
P6PL == 0X0E
;
;{ ; Bit[n]="0", Disable P6.[n] Pull Low Function. n=7~0
; Bit[n]="1", Enable P6.[n] Pull Low Function. n=7~0
mPL67 == 0x80 ;
mPL66 == 0x40 ;
mPL65 == 0x20 ;
mPL64 == 0x10 ;
mPL63 == 0x08 ;
mPL62 == 0x04 ;
mPL61 == 0x02 ;
mPL60 == 0x01 ;
;}
;
;======================================================;
; Others Define ;
;======================================================;
;
; Bit set use BC or BS
;
B0 == 0x00
B1 == 0x01
B2 == 0x02
B3 == 0x03
B4 == 0x04
B5 == 0x05
B6 == 0x06
B7 == 0x07
;
mB0 == 0x01
mB1 == 0x02
mB2 == 0x04
mB3 == 0x08
mB4 == 0x10
mB5 == 0x20
mB6 == 0x40
mB7 == 0x80
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